zephyr/soc/infineon/cat1a/common/rom_cm0image.ld

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/*
* Copyright (c) 2021 Cypress Semiconductor Corporation (an Infineon company) or
* an affiliate of Cypress Semiconductor Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/* Cortex-M0+ application flash image area */
. = ALIGN(4);
__cy_m0p_code_start = . ;
KEEP(*(.cy_m0p_image))
. = CONFIG_SOC_PSOC6_CM0P_IMAGE_ROM_SIZE;
__cy_m0p_code_end = . ;