82bace6e0d
Config the sram0 to be non-cachable to PASS the DMA testcases chan_blen_transfer and loop_transfer on the stm32f746zg and stm32f767zi nucleo boards. The CONFIG_NOCACHE_MEMORY is useless as the memory region gets the NOCACHE ATTRibutes for stm32H7 or stm32F7 as well. Signed-off-by: Francois Ramu <francois.ramu@st.com> |
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chan_blen_transfer | ||
chan_link_transfer | ||
loop_transfer | ||
scatter_gather |