64 lines
2.1 KiB
C
64 lines
2.1 KiB
C
/*
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* Copyright (c) 2023 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT renesas_rzt2m_pinctrl
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#include <zephyr/arch/cpu.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <soc.h>
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#define PORT_NSR DT_INST_REG_ADDR_BY_NAME(0, port_nsr)
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#define PTADR DT_INST_REG_ADDR_BY_NAME(0, ptadr)
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/* Port m mode control register */
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#define PMC(port) (PORT_NSR + 0x400 + port)
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/* Port m function control register */
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#define PFC(port) (PORT_NSR + 0x600 + (0x4 * port))
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/* IO Buffer m function switching register */
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#define DRCTL(port, pin) (PORT_NSR + 0xa00 + (0x8 * port) + pin)
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/* Port m region select register */
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#define RSELP(port) (PTADR + port)
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#define DRCTL_DRIVE_STRENGTH(val) (val & 0x3)
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#define DRCTL_PULL_UP_DOWN(val) ((val & 0x3) << 2)
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#define DRCTL_SCHMITT(val) ((val & 0x1) << 4)
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#define DRCTL_SLEW_RATE(val) ((val & 0x1) << 5)
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#define DRCTL_CONFIG(drive, pull, schmitt, slew) \
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(DRCTL_DRIVE_STRENGTH(drive) | DRCTL_PULL_UP_DOWN(pull) | DRCTL_SCHMITT(schmitt) | \
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DRCTL_SLEW_RATE(slew))
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#define PFC_FUNC_MASK(pin) (0xf << (pin * 4))
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static void pinctrl_configure_pin(const pinctrl_soc_pin_t *pin)
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{
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uint8_t rselp = sys_read8(RSELP(pin->port));
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uint32_t pfc = sys_read32(PFC(pin->port)) & ~(PFC_FUNC_MASK(pin->pin));
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uint8_t pmc = sys_read8(PMC(pin->port));
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/* Set proper bit in the RSELP register to use as non-safety domain. */
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sys_write8(rselp | BIT(pin->pin), RSELP(pin->port));
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sys_write8(DRCTL_CONFIG(
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pin->drive_strength, (pin->pull_up == 1 ? 1U : (pin->pull_down == 1 ? 2U : 0)),
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pin->schmitt_enable, pin->slew_rate),
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DRCTL(pin->port, pin->pin));
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/* Select function for the pin. */
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sys_write32(pfc | pin->func << (pin->pin * 4), PFC(pin->port));
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/* Set proper bit in the PMC register to use the pin as a peripheral IO. */
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sys_write8(pmc | BIT(pin->pin), PMC(pin->port));
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}
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int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg)
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{
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ARG_UNUSED(reg);
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for (uint8_t i = 0U; i < pin_cnt; i++) {
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pinctrl_configure_pin(pins++);
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}
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return 0;
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}
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