zephyr/drivers/bbram
Adrien Bruant 176d433b98 drivers: bbram: stm32-bbram: port to stm32wl
On STM32WL, the backup memory is defined as part of the TAMP peripheral.
This seems to be a deviation from the stm32 family where this memory is
defined as part of the RTC.

The STM32WL reference manual shows that tamp_pclk is connected to
rtc_pclk. This means that the clock required to run the TAMP peripheral
is the same as the RTC's. A quick port of BBRAM on STM32WL is achieved
by instanciating the bbram device as a child of the RTC and by modifying
the address offset to the first backup register from the rtc base
address.

Signed-off-by: Adrien Bruant <adrien.bruant@aalberts-hfc.com>
2023-11-21 08:40:51 +00:00
..
CMakeLists.txt
Kconfig
Kconfig.bbram_emul
Kconfig.it8xxx2
Kconfig.microchip
Kconfig.npcx
Kconfig.stm32
Kconfig.xec
bbram_emul.c
bbram_handlers.c syscall: rename Z_OOPS -> K_OOPS 2023-11-03 11:46:52 +01:00
bbram_it8xxx2.c
bbram_microchip_mcp7940n.c
bbram_npcx.c
bbram_shell.c
bbram_stm32.c drivers: bbram: stm32-bbram: port to stm32wl 2023-11-21 08:40:51 +00:00
bbram_xec.c