zephyr/arch/riscv
Flavio Ceolin b7d04487e1 arch: riscv: Fix 10.4 violations
Both operands of an operator in which the usual arithmetic
conversions are performed shall have the same essential
type category.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-04-10 09:59:37 -04:00
..
core arch: riscv: Fix 10.4 violations 2021-04-10 09:59:37 -04:00
include arch: riscv: add memory protection support 2020-11-09 15:37:11 -05:00
CMakeLists.txt
Kconfig arch/riscv: boost default stacks 2021-01-15 13:06:33 -05:00