474 lines
12 KiB
C
474 lines
12 KiB
C
/*
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* Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/drivers/spi.h>
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#include <zephyr/pm/device.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <soc.h>
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#include <nrfx_spi.h>
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#include <zephyr/logging/log.h>
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#include <zephyr/irq.h>
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LOG_MODULE_REGISTER(spi_nrfx_spi, CONFIG_SPI_LOG_LEVEL);
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#include "spi_context.h"
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#include "spi_nrfx_common.h"
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struct spi_nrfx_data {
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struct spi_context ctx;
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const struct device *dev;
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size_t chunk_len;
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bool busy;
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bool initialized;
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};
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struct spi_nrfx_config {
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nrfx_spi_t spi;
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nrfx_spi_config_t def_config;
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void (*irq_connect)(void);
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const struct pinctrl_dev_config *pcfg;
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uint32_t wake_pin;
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nrfx_gpiote_t wake_gpiote;
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};
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static void event_handler(const nrfx_spi_evt_t *p_event, void *p_context);
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static inline nrf_spi_frequency_t get_nrf_spi_frequency(uint32_t frequency)
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{
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/* Get the highest supported frequency not exceeding the requested one.
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*/
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if (frequency < 250000) {
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return NRF_SPI_FREQ_125K;
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} else if (frequency < 500000) {
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return NRF_SPI_FREQ_250K;
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} else if (frequency < 1000000) {
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return NRF_SPI_FREQ_500K;
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} else if (frequency < 2000000) {
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return NRF_SPI_FREQ_1M;
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} else if (frequency < 4000000) {
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return NRF_SPI_FREQ_2M;
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} else if (frequency < 8000000) {
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return NRF_SPI_FREQ_4M;
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} else {
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return NRF_SPI_FREQ_8M;
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}
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}
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static inline nrf_spi_mode_t get_nrf_spi_mode(uint16_t operation)
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{
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if (SPI_MODE_GET(operation) & SPI_MODE_CPOL) {
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if (SPI_MODE_GET(operation) & SPI_MODE_CPHA) {
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return NRF_SPI_MODE_3;
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} else {
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return NRF_SPI_MODE_2;
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}
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} else {
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if (SPI_MODE_GET(operation) & SPI_MODE_CPHA) {
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return NRF_SPI_MODE_1;
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} else {
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return NRF_SPI_MODE_0;
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}
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}
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}
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static inline nrf_spi_bit_order_t get_nrf_spi_bit_order(uint16_t operation)
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{
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if (operation & SPI_TRANSFER_LSB) {
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return NRF_SPI_BIT_ORDER_LSB_FIRST;
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} else {
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return NRF_SPI_BIT_ORDER_MSB_FIRST;
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}
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}
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static int configure(const struct device *dev,
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const struct spi_config *spi_cfg)
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{
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struct spi_nrfx_data *dev_data = dev->data;
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const struct spi_nrfx_config *dev_config = dev->config;
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struct spi_context *ctx = &dev_data->ctx;
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nrfx_spi_config_t config;
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nrfx_err_t result;
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if (dev_data->initialized && spi_context_configured(ctx, spi_cfg)) {
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/* Already configured. No need to do it again. */
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return 0;
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}
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if (spi_cfg->operation & SPI_HALF_DUPLEX) {
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LOG_ERR("Half-duplex not supported");
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return -ENOTSUP;
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}
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if (SPI_OP_MODE_GET(spi_cfg->operation) != SPI_OP_MODE_MASTER) {
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LOG_ERR("Slave mode is not supported on %s", dev->name);
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return -EINVAL;
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}
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if (spi_cfg->operation & SPI_MODE_LOOP) {
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LOG_ERR("Loopback mode is not supported");
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return -EINVAL;
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}
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if (IS_ENABLED(CONFIG_SPI_EXTENDED_MODES) &&
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(spi_cfg->operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) {
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LOG_ERR("Only single line mode is supported");
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return -EINVAL;
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}
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if (SPI_WORD_SIZE_GET(spi_cfg->operation) != 8) {
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LOG_ERR("Word sizes other than 8 bits are not supported");
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return -EINVAL;
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}
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if (spi_cfg->frequency < 125000) {
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LOG_ERR("Frequencies lower than 125 kHz are not supported");
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return -EINVAL;
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}
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config = dev_config->def_config;
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config.frequency = get_nrf_spi_frequency(spi_cfg->frequency);
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config.mode = get_nrf_spi_mode(spi_cfg->operation);
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config.bit_order = get_nrf_spi_bit_order(spi_cfg->operation);
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nrf_gpio_pin_write(nrf_spi_sck_pin_get(dev_config->spi.p_reg),
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spi_cfg->operation & SPI_MODE_CPOL ? 1 : 0);
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if (dev_data->initialized) {
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nrfx_spi_uninit(&dev_config->spi);
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dev_data->initialized = false;
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}
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result = nrfx_spi_init(&dev_config->spi, &config,
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event_handler, dev_data);
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if (result != NRFX_SUCCESS) {
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LOG_ERR("Failed to initialize nrfx driver: %08x", result);
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return -EIO;
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}
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dev_data->initialized = true;
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ctx->config = spi_cfg;
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return 0;
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}
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static void finish_transaction(const struct device *dev, int error)
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{
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struct spi_nrfx_data *dev_data = dev->data;
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struct spi_context *ctx = &dev_data->ctx;
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LOG_DBG("Transaction finished with status %d", error);
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spi_context_complete(ctx, dev, error);
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dev_data->busy = false;
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}
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static void transfer_next_chunk(const struct device *dev)
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{
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const struct spi_nrfx_config *dev_config = dev->config;
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struct spi_nrfx_data *dev_data = dev->data;
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struct spi_context *ctx = &dev_data->ctx;
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int error = 0;
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size_t chunk_len = spi_context_max_continuous_chunk(ctx);
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if (chunk_len > 0) {
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nrfx_spi_xfer_desc_t xfer;
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nrfx_err_t result;
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dev_data->chunk_len = chunk_len;
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xfer.p_tx_buffer = ctx->tx_buf;
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xfer.tx_length = spi_context_tx_buf_on(ctx) ? chunk_len : 0;
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xfer.p_rx_buffer = ctx->rx_buf;
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xfer.rx_length = spi_context_rx_buf_on(ctx) ? chunk_len : 0;
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result = nrfx_spi_xfer(&dev_config->spi, &xfer, 0);
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if (result == NRFX_SUCCESS) {
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return;
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}
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error = -EIO;
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}
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finish_transaction(dev, error);
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}
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static void event_handler(const nrfx_spi_evt_t *p_event, void *p_context)
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{
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struct spi_nrfx_data *dev_data = p_context;
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if (p_event->type == NRFX_SPI_EVENT_DONE) {
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/* Chunk length is set to 0 when a transaction is aborted
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* due to a timeout.
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*/
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if (dev_data->chunk_len == 0) {
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finish_transaction(dev_data->dev, -ETIMEDOUT);
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return;
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}
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spi_context_update_tx(&dev_data->ctx, 1, dev_data->chunk_len);
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spi_context_update_rx(&dev_data->ctx, 1, dev_data->chunk_len);
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transfer_next_chunk(dev_data->dev);
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}
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}
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static int transceive(const struct device *dev,
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const struct spi_config *spi_cfg,
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const struct spi_buf_set *tx_bufs,
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const struct spi_buf_set *rx_bufs,
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bool asynchronous,
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spi_callback_t cb,
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void *userdata)
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{
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struct spi_nrfx_data *dev_data = dev->data;
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const struct spi_nrfx_config *dev_config = dev->config;
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int error;
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spi_context_lock(&dev_data->ctx, asynchronous, cb, userdata, spi_cfg);
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error = configure(dev, spi_cfg);
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if (error == 0) {
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dev_data->busy = true;
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if (dev_config->wake_pin != WAKE_PIN_NOT_USED) {
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error = spi_nrfx_wake_request(&dev_config->wake_gpiote,
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dev_config->wake_pin);
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if (error == -ETIMEDOUT) {
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LOG_WRN("Waiting for WAKE acknowledgment timed out");
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/* If timeout occurs, try to perform the transfer
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* anyway, just in case the slave device was unable
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* to signal that it was already awaken and prepared
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* for the transfer.
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*/
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}
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}
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spi_context_buffers_setup(&dev_data->ctx, tx_bufs, rx_bufs, 1);
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spi_context_cs_control(&dev_data->ctx, true);
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transfer_next_chunk(dev);
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error = spi_context_wait_for_completion(&dev_data->ctx);
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if (error == -ETIMEDOUT) {
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/* Set the chunk length to 0 so that event_handler()
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* knows that the transaction timed out and is to be
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* aborted.
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*/
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dev_data->chunk_len = 0;
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/* Abort the current transfer by deinitializing
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* the nrfx driver.
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*/
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nrfx_spi_uninit(&dev_config->spi);
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dev_data->initialized = false;
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/* Make sure the transaction is finished (it may be
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* already finished if it actually did complete before
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* the nrfx driver was deinitialized).
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*/
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finish_transaction(dev, -ETIMEDOUT);
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/* Clean up the driver state. */
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k_sem_reset(&dev_data->ctx.sync);
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}
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spi_context_cs_control(&dev_data->ctx, false);
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}
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spi_context_release(&dev_data->ctx, error);
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return error;
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}
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static int spi_nrfx_transceive(const struct device *dev,
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const struct spi_config *spi_cfg,
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const struct spi_buf_set *tx_bufs,
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const struct spi_buf_set *rx_bufs)
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{
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return transceive(dev, spi_cfg, tx_bufs, rx_bufs, false, NULL, NULL);
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}
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#ifdef CONFIG_SPI_ASYNC
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static int spi_nrfx_transceive_async(const struct device *dev,
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const struct spi_config *spi_cfg,
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const struct spi_buf_set *tx_bufs,
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const struct spi_buf_set *rx_bufs,
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spi_callback_t cb,
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void *userdata)
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{
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return transceive(dev, spi_cfg, tx_bufs, rx_bufs, true, cb, userdata);
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}
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#endif /* CONFIG_SPI_ASYNC */
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static int spi_nrfx_release(const struct device *dev,
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const struct spi_config *spi_cfg)
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{
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struct spi_nrfx_data *dev_data = dev->data;
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if (!spi_context_configured(&dev_data->ctx, spi_cfg)) {
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return -EINVAL;
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}
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if (dev_data->busy) {
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return -EBUSY;
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}
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spi_context_unlock_unconditionally(&dev_data->ctx);
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return 0;
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}
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static const struct spi_driver_api spi_nrfx_driver_api = {
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.transceive = spi_nrfx_transceive,
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#ifdef CONFIG_SPI_ASYNC
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.transceive_async = spi_nrfx_transceive_async,
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#endif
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.release = spi_nrfx_release,
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};
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#ifdef CONFIG_PM_DEVICE
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static int spi_nrfx_pm_action(const struct device *dev,
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enum pm_device_action action)
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{
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int ret = 0;
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struct spi_nrfx_data *dev_data = dev->data;
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const struct spi_nrfx_config *dev_config = dev->config;
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switch (action) {
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case PM_DEVICE_ACTION_RESUME:
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ret = pinctrl_apply_state(dev_config->pcfg,
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PINCTRL_STATE_DEFAULT);
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if (ret < 0) {
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return ret;
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}
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/* nrfx_spi_init() will be called at configuration before
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* the next transfer.
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*/
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break;
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case PM_DEVICE_ACTION_SUSPEND:
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if (dev_data->initialized) {
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nrfx_spi_uninit(&dev_config->spi);
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dev_data->initialized = false;
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}
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ret = pinctrl_apply_state(dev_config->pcfg,
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PINCTRL_STATE_SLEEP);
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if (ret < 0) {
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return ret;
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}
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break;
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default:
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ret = -ENOTSUP;
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}
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return ret;
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}
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#endif /* CONFIG_PM_DEVICE */
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static int spi_nrfx_init(const struct device *dev)
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{
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const struct spi_nrfx_config *dev_config = dev->config;
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struct spi_nrfx_data *dev_data = dev->data;
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int err;
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err = pinctrl_apply_state(dev_config->pcfg, PINCTRL_STATE_DEFAULT);
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if (err < 0) {
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return err;
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}
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if (dev_config->wake_pin != WAKE_PIN_NOT_USED) {
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err = spi_nrfx_wake_init(&dev_config->wake_gpiote, dev_config->wake_pin);
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if (err == -ENODEV) {
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LOG_ERR("Failed to allocate GPIOTE channel for WAKE");
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return err;
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}
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if (err == -EIO) {
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LOG_ERR("Failed to configure WAKE pin");
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return err;
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}
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}
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dev_config->irq_connect();
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err = spi_context_cs_configure_all(&dev_data->ctx);
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if (err < 0) {
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return err;
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}
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spi_context_unlock_unconditionally(&dev_data->ctx);
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return 0;
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}
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/*
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* Current factors requiring use of DT_NODELABEL:
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*
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* - HAL design (requirement of drv_inst_idx in nrfx_spi_t)
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* - Name-based HAL IRQ handlers, e.g. nrfx_spi_0_irq_handler
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*/
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#define SPI(idx) DT_NODELABEL(spi##idx)
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#define SPI_PROP(idx, prop) DT_PROP(SPI(idx), prop)
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#define SPI_NRFX_SPI_DEFINE(idx) \
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NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(SPI(idx)); \
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static void irq_connect##idx(void) \
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{ \
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IRQ_CONNECT(DT_IRQN(SPI(idx)), DT_IRQ(SPI(idx), priority), \
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nrfx_isr, nrfx_spi_##idx##_irq_handler, 0); \
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} \
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static struct spi_nrfx_data spi_##idx##_data = { \
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SPI_CONTEXT_INIT_LOCK(spi_##idx##_data, ctx), \
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SPI_CONTEXT_INIT_SYNC(spi_##idx##_data, ctx), \
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SPI_CONTEXT_CS_GPIOS_INITIALIZE(SPI(idx), ctx) \
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.dev = DEVICE_DT_GET(SPI(idx)), \
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.busy = false, \
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}; \
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PINCTRL_DT_DEFINE(SPI(idx)); \
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static const struct spi_nrfx_config spi_##idx##z_config = { \
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.spi = { \
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.p_reg = (NRF_SPI_Type *)DT_REG_ADDR(SPI(idx)), \
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.drv_inst_idx = NRFX_SPI##idx##_INST_IDX, \
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}, \
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.def_config = { \
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.skip_gpio_cfg = true, \
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.skip_psel_cfg = true, \
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.ss_pin = NRFX_SPI_PIN_NOT_USED, \
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.orc = SPI_PROP(idx, overrun_character), \
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}, \
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.irq_connect = irq_connect##idx, \
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.pcfg = PINCTRL_DT_DEV_CONFIG_GET(SPI(idx)), \
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.wake_pin = NRF_DT_GPIOS_TO_PSEL_OR(SPI(idx), wake_gpios, \
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WAKE_PIN_NOT_USED), \
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.wake_gpiote = WAKE_GPIOTE_INSTANCE(SPI(idx)), \
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}; \
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BUILD_ASSERT(!DT_NODE_HAS_PROP(SPI(idx), wake_gpios) || \
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!(DT_GPIO_FLAGS(SPI(idx), wake_gpios) & GPIO_ACTIVE_LOW), \
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"WAKE line must be configured as active high"); \
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PM_DEVICE_DT_DEFINE(SPI(idx), spi_nrfx_pm_action); \
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DEVICE_DT_DEFINE(SPI(idx), \
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spi_nrfx_init, \
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PM_DEVICE_DT_GET(SPI(idx)), \
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&spi_##idx##_data, \
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&spi_##idx##z_config, \
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POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \
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&spi_nrfx_driver_api)
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#ifdef CONFIG_HAS_HW_NRF_SPI0
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SPI_NRFX_SPI_DEFINE(0);
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#endif
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#ifdef CONFIG_HAS_HW_NRF_SPI1
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SPI_NRFX_SPI_DEFINE(1);
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#endif
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#ifdef CONFIG_HAS_HW_NRF_SPI2
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SPI_NRFX_SPI_DEFINE(2);
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#endif
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