44 lines
1.2 KiB
Plaintext
44 lines
1.2 KiB
Plaintext
/*
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* Copyright (c) 2018 Synopsys, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @brief Linker script for the Synopsys EM Starterkit platform.
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*/
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#include <zephyr/devicetree.h>
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/*
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* DRAM base address and size
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*
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* DRAM includes the exception vector table at reset, which is at
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* the beginning of the region.
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*/
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#if DT_NODE_HAS_PROP(DT_NODELABEL(ddr0), reg) && \
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(DT_REG_SIZE(DT_NODELABEL(ddr0)) > 0)
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#define SRAM_START DT_REG_ADDR(DT_NODELABEL(ddr0))
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#define SRAM_SIZE DT_REG_SIZE(DT_NODELABEL(ddr0))
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#endif
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/* Instruction Closely Coupled Memory (ICCM) base address and size */
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#if DT_NODE_HAS_PROP(DT_INST(0, arc_iccm), reg) && \
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(DT_REG_SIZE(DT_INST(0, arc_iccm)) > 0)
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#define ICCM_START DT_REG_ADDR(DT_INST(0, arc_iccm))
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#define ICCM_SIZE DT_REG_SIZE(DT_INST(0, arc_iccm))
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#endif
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/*
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* DCCM base address and size. DCCM is the data memory.
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*/
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/* Data Closely Coupled Memory (DCCM) base address and size */
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#if DT_NODE_HAS_PROP(DT_INST(0, arc_dccm), reg) && \
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(DT_REG_SIZE(DT_INST(0, arc_dccm)) > 0)
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#define DCCM_START DT_REG_ADDR(DT_INST(0, arc_dccm))
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#define DCCM_SIZE DT_REG_SIZE(DT_INST(0, arc_dccm))
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#endif
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#include <zephyr/arch/arc/v2/xy_mem.ld>
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#include <zephyr/arch/arc/v2/linker.ld>
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