302 lines
8.1 KiB
C
302 lines
8.1 KiB
C
/*
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* Copyright (c) 2019 Vestas Wind Systems A/S
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*
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* Based on adc_mcux_adc16.c, which is:
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* Copyright (c) 2017-2018, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nxp_kinetis_adc12
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#include <drivers/adc.h>
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#include <fsl_adc12.h>
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#define LOG_LEVEL CONFIG_ADC_LOG_LEVEL
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#include <logging/log.h>
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LOG_MODULE_REGISTER(adc_mcux_adc12);
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#define ADC_CONTEXT_USES_KERNEL_TIMER
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#include "adc_context.h"
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struct mcux_adc12_config {
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ADC_Type *base;
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adc12_clock_source_t clock_src;
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adc12_clock_divider_t clock_div;
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adc12_reference_voltage_source_t ref_src;
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uint32_t sample_clk_count;
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void (*irq_config_func)(const struct device *dev);
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};
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struct mcux_adc12_data {
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const struct device *dev;
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struct adc_context ctx;
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uint16_t *buffer;
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uint16_t *repeat_buffer;
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uint32_t channels;
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uint8_t channel_id;
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};
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static int mcux_adc12_channel_setup(const struct device *dev,
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const struct adc_channel_cfg *channel_cfg)
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{
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uint8_t channel_id = channel_cfg->channel_id;
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if (channel_id > (ADC_SC1_ADCH_MASK >> ADC_SC1_ADCH_SHIFT)) {
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LOG_ERR("Invalid channel %d", channel_id);
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return -EINVAL;
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}
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if (channel_cfg->acquisition_time != ADC_ACQ_TIME_DEFAULT) {
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LOG_ERR("Unsupported channel acquisition time");
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return -ENOTSUP;
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}
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if (channel_cfg->differential) {
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LOG_ERR("Differential channels are not supported");
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return -ENOTSUP;
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}
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if (channel_cfg->gain != ADC_GAIN_1) {
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LOG_ERR("Unsupported channel gain %d", channel_cfg->gain);
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return -ENOTSUP;
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}
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if (channel_cfg->reference != ADC_REF_INTERNAL) {
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LOG_ERR("Unsupported channel reference");
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return -ENOTSUP;
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}
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return 0;
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}
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static int mcux_adc12_start_read(const struct device *dev,
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const struct adc_sequence *sequence)
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{
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const struct mcux_adc12_config *config = dev->config;
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struct mcux_adc12_data *data = dev->data;
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adc12_hardware_average_mode_t mode;
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adc12_resolution_t resolution;
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ADC_Type *base = config->base;
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int error;
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uint32_t tmp32;
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switch (sequence->resolution) {
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case 8:
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resolution = kADC12_Resolution8Bit;
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break;
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case 10:
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resolution = kADC12_Resolution10Bit;
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break;
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case 12:
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resolution = kADC12_Resolution12Bit;
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break;
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default:
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LOG_ERR("Unsupported resolution %d", sequence->resolution);
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return -ENOTSUP;
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}
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tmp32 = base->CFG1 & ~(ADC_CFG1_MODE_MASK);
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tmp32 |= ADC_CFG1_MODE(resolution);
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base->CFG1 = tmp32;
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switch (sequence->oversampling) {
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case 0:
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mode = kADC12_HardwareAverageDisabled;
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break;
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case 2:
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mode = kADC12_HardwareAverageCount4;
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break;
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case 3:
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mode = kADC12_HardwareAverageCount8;
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break;
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case 4:
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mode = kADC12_HardwareAverageCount16;
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break;
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case 5:
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mode = kADC12_HardwareAverageCount32;
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break;
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default:
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LOG_ERR("Unsupported oversampling value %d",
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sequence->oversampling);
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return -ENOTSUP;
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}
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ADC12_SetHardwareAverage(config->base, mode);
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data->buffer = sequence->buffer;
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adc_context_start_read(&data->ctx, sequence);
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error = adc_context_wait_for_completion(&data->ctx);
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return error;
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}
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static int mcux_adc12_read_async(const struct device *dev,
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const struct adc_sequence *sequence,
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struct k_poll_signal *async)
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{
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struct mcux_adc12_data *data = dev->data;
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int error;
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adc_context_lock(&data->ctx, async ? true : false, async);
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error = mcux_adc12_start_read(dev, sequence);
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adc_context_release(&data->ctx, error);
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return error;
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}
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static int mcux_adc12_read(const struct device *dev,
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const struct adc_sequence *sequence)
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{
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return mcux_adc12_read_async(dev, sequence, NULL);
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}
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static void mcux_adc12_start_channel(const struct device *dev)
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{
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const struct mcux_adc12_config *config = dev->config;
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struct mcux_adc12_data *data = dev->data;
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adc12_channel_config_t channel_config;
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uint32_t channel_group = 0U;
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data->channel_id = find_lsb_set(data->channels) - 1;
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LOG_DBG("Starting channel %d", data->channel_id);
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channel_config.enableInterruptOnConversionCompleted = true;
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channel_config.channelNumber = data->channel_id;
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ADC12_SetChannelConfig(config->base, channel_group, &channel_config);
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}
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static void adc_context_start_sampling(struct adc_context *ctx)
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{
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struct mcux_adc12_data *data =
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CONTAINER_OF(ctx, struct mcux_adc12_data, ctx);
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data->channels = ctx->sequence.channels;
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data->repeat_buffer = data->buffer;
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mcux_adc12_start_channel(data->dev);
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}
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static void adc_context_update_buffer_pointer(struct adc_context *ctx,
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bool repeat_sampling)
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{
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struct mcux_adc12_data *data =
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CONTAINER_OF(ctx, struct mcux_adc12_data, ctx);
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if (repeat_sampling) {
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data->buffer = data->repeat_buffer;
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}
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}
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static void mcux_adc12_isr(const struct device *dev)
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{
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const struct mcux_adc12_config *config = dev->config;
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struct mcux_adc12_data *data = dev->data;
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ADC_Type *base = config->base;
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uint32_t channel_group = 0U;
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uint16_t result;
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result = ADC12_GetChannelConversionValue(base, channel_group);
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LOG_DBG("Finished channel %d. Result is 0x%04x",
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data->channel_id, result);
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*data->buffer++ = result;
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data->channels &= ~BIT(data->channel_id);
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if (data->channels) {
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mcux_adc12_start_channel(dev);
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} else {
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adc_context_on_sampling_done(&data->ctx, dev);
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}
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}
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static int mcux_adc12_init(const struct device *dev)
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{
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const struct mcux_adc12_config *config = dev->config;
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struct mcux_adc12_data *data = dev->data;
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ADC_Type *base = config->base;
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adc12_config_t adc_config;
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ADC12_GetDefaultConfig(&adc_config);
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adc_config.referenceVoltageSource = config->ref_src;
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adc_config.clockSource = config->clock_src;
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adc_config.clockDivider = config->clock_div;
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adc_config.sampleClockCount = config->sample_clk_count;
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adc_config.resolution = kADC12_Resolution12Bit;
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adc_config.enableContinuousConversion = false;
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ADC12_Init(base, &adc_config);
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ADC12_DoAutoCalibration(base);
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ADC12_EnableHardwareTrigger(base, false);
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config->irq_config_func(dev);
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data->dev = dev;
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adc_context_unlock_unconditionally(&data->ctx);
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return 0;
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}
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static const struct adc_driver_api mcux_adc12_driver_api = {
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.channel_setup = mcux_adc12_channel_setup,
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.read = mcux_adc12_read,
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#ifdef CONFIG_ADC_ASYNC
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.read_async = mcux_adc12_read_async,
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#endif
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};
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#define ASSERT_WITHIN_RANGE(val, min, max, str) \
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BUILD_ASSERT(val >= min && val <= max, str)
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#define ASSERT_ADC12_CLK_DIV_VALID(val, str) \
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BUILD_ASSERT(val == 1 || val == 2 || val == 4 || val == 8, str)
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#define TO_ADC12_CLOCK_SRC(val) _DO_CONCAT(kADC12_ClockSourceAlt, val)
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#define TO_ADC12_CLOCK_DIV(val) _DO_CONCAT(kADC12_ClockDivider, val)
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#define ADC12_REF_SRC(n) \
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COND_CODE_1(DT_INST_PROP(0, alternate_voltage_reference), \
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(kADC12_ReferenceVoltageSourceValt), \
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(kADC12_ReferenceVoltageSourceVref))
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#define ACD12_MCUX_INIT(n) \
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static void mcux_adc12_config_func_##n(const struct device *dev); \
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\
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ASSERT_WITHIN_RANGE(DT_INST_PROP(n, clk_source), 0, 3, \
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"Invalid clock source"); \
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ASSERT_ADC12_CLK_DIV_VALID(DT_INST_PROP(n, clk_divider), \
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"Invalid clock divider"); \
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ASSERT_WITHIN_RANGE(DT_INST_PROP(n, sample_time), 2, 256, \
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"Invalid sample time"); \
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static const struct mcux_adc12_config mcux_adc12_config_##n = { \
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.base = (ADC_Type *)DT_INST_REG_ADDR(n), \
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.clock_src = TO_ADC12_CLOCK_SRC(DT_INST_PROP(n, clk_source)),\
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.clock_div = \
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TO_ADC12_CLOCK_DIV(DT_INST_PROP(n, clk_divider)),\
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.ref_src = ADC12_REF_SRC(n), \
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.sample_clk_count = DT_INST_PROP(n, sample_time), \
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.irq_config_func = mcux_adc12_config_func_##n, \
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}; \
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\
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static struct mcux_adc12_data mcux_adc12_data_##n = { \
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ADC_CONTEXT_INIT_TIMER(mcux_adc12_data_##n, ctx), \
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ADC_CONTEXT_INIT_LOCK(mcux_adc12_data_##n, ctx), \
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ADC_CONTEXT_INIT_SYNC(mcux_adc12_data_##n, ctx), \
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}; \
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\
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DEVICE_AND_API_INIT(mcux_adc12_##n, DT_INST_LABEL(n), \
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&mcux_adc12_init, &mcux_adc12_data_##n, \
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&mcux_adc12_config_##n, POST_KERNEL, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&mcux_adc12_driver_api); \
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\
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static void mcux_adc12_config_func_##n(const struct device *dev) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(n), \
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DT_INST_IRQ(n, priority), mcux_adc12_isr, \
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DEVICE_GET(mcux_adc12_##n), 0); \
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\
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irq_enable(DT_INST_IRQN(n)); \
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}
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DT_INST_FOREACH_STATUS_OKAY(ACD12_MCUX_INIT)
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