35 lines
698 B
C
35 lines
698 B
C
/*
|
|
* Copyright (c) 2016 RnDity Sp. z o.o.
|
|
*
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*/
|
|
|
|
/**
|
|
* @file
|
|
* @brief System/hardware module for STM32F3 processor
|
|
*/
|
|
|
|
#include <zephyr/device.h>
|
|
#include <zephyr/init.h>
|
|
#include <stm32_ll_system.h>
|
|
|
|
#include <cmsis_core.h>
|
|
|
|
/**
|
|
* @brief Perform basic hardware initialization at boot.
|
|
*
|
|
* This needs to be run from the very beginning.
|
|
*/
|
|
void soc_early_init_hook(void)
|
|
{
|
|
/* Enable ART Accelerator prefetch */
|
|
LL_FLASH_EnablePrefetch();
|
|
|
|
/* Update CMSIS SystemCoreClock variable (HCLK) */
|
|
/* At reset, system core clock is set to 8 MHz from HSI */
|
|
SystemCoreClock = 8000000;
|
|
|
|
/* Allow reflashing the board */
|
|
LL_DBGMCU_EnableDBGSleepMode();
|
|
}
|