164 lines
3.4 KiB
C
164 lines
3.4 KiB
C
/*
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* Copyright (c) 2019 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define LOG_DOMAIN flash_stm32f3
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#define LOG_LEVEL CONFIG_FLASH_LOG_LEVEL
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#include <logging/log.h>
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LOG_MODULE_REGISTER(LOG_DOMAIN);
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#include <kernel.h>
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#include <device.h>
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#include <string.h>
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#include <drivers/flash.h>
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#include <init.h>
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#include <soc.h>
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#include "flash_stm32.h"
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/* offset and len must be aligned on 2 for write
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* , positive and not beyond end of flash */
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bool flash_stm32_valid_range(struct device *dev, off_t offset, uint32_t len,
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bool write)
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{
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return (!write || (offset % 2 == 0 && len % 2 == 0U)) &&
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flash_stm32_range_exists(dev, offset, len);
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}
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static unsigned int get_page(off_t offset)
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{
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return offset / FLASH_PAGE_SIZE;
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}
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static int erase_page(struct device *dev, unsigned int page)
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{
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FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
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uint32_t page_address = CONFIG_FLASH_BASE_ADDRESS;
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int rc;
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/* if the control register is locked, do not fail silently */
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if (regs->CR & FLASH_CR_LOCK) {
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return -EIO;
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}
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/* Check that no Flash memory operation is ongoing */
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rc = flash_stm32_wait_flash_idle(dev);
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if (rc < 0) {
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return rc;
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}
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page_address += page * FLASH_PAGE_SIZE;
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/* Set the PER bit and select the page you wish to erase */
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regs->CR |= FLASH_CR_PER;
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/* Set page address */
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regs->AR = page_address;
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/* Set the STRT bit */
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regs->CR |= FLASH_CR_STRT;
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/* Wait for the BSY bit */
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rc = flash_stm32_wait_flash_idle(dev);
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regs->CR &= ~FLASH_CR_PER;
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return rc;
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}
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int flash_stm32_block_erase_loop(struct device *dev, unsigned int offset,
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unsigned int len)
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{
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int i, rc = 0;
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i = get_page(offset);
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for (; i <= get_page(offset + len - 1) ; ++i) {
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rc = erase_page(dev, i);
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if (rc < 0) {
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break;
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}
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}
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return rc;
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}
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static int write_hword(struct device *dev, off_t offset, uint16_t val)
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{
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volatile uint16_t *flash = (uint16_t *)(offset + CONFIG_FLASH_BASE_ADDRESS);
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FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
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uint32_t tmp;
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int rc;
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/* if the control register is locked, do not fail silently */
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if (regs->CR & FLASH_CR_LOCK) {
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return -EIO;
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}
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/* Check that no Flash main memory operation is ongoing */
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rc = flash_stm32_wait_flash_idle(dev);
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if (rc < 0) {
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return rc;
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}
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/* Check if this half word is erased */
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if (*flash != 0xFFFF) {
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return -EIO;
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}
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/* Set the PG bit */
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regs->CR |= FLASH_CR_PG;
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/* Flush the register write */
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tmp = regs->CR;
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/* Perform the data write operation at the desired memory address */
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*flash = val;
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/* Wait until the BSY bit is cleared */
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rc = flash_stm32_wait_flash_idle(dev);
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/* Clear the PG bit */
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regs->CR &= (~FLASH_CR_PG);
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return rc;
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}
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int flash_stm32_write_range(struct device *dev, unsigned int offset,
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const void *data, unsigned int len)
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{
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int i, rc = 0;
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for (i = 0; i < len; i += 2, offset += 2U) {
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rc = write_hword(dev, offset, ((const uint16_t *) data)[i>>1]);
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if (rc < 0) {
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return rc;
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}
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}
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return rc;
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}
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void flash_stm32_page_layout(struct device *dev,
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const struct flash_pages_layout **layout,
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size_t *layout_size)
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{
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static struct flash_pages_layout stm32f3_flash_layout = {
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.pages_count = 0,
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.pages_size = 0,
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};
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ARG_UNUSED(dev);
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if (stm32f3_flash_layout.pages_count == 0) {
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stm32f3_flash_layout.pages_count =
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DT_REG_SIZE(DT_INST(0, soc_nv_flash)) / FLASH_PAGE_SIZE;
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stm32f3_flash_layout.pages_size = FLASH_PAGE_SIZE;
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}
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*layout = &stm32f3_flash_layout;
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*layout_size = 1;
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}
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