261 lines
7.6 KiB
YAML
261 lines
7.6 KiB
YAML
# Copyright (c) 2023 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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description: Renesas Smartbond(tm) NOR/PSRAM controller
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include: base.yaml
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compatible: "renesas,smartbond-nor-psram"
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properties:
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reg:
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required: true
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is-ram:
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type: boolean
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description: |
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If present, the memory controller will be configured to drive PSRAM devices.
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dev-size:
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type: int
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required: true
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description: |
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Memory size/capacity in bits.
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dev-type:
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type: int
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required: true
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description: |
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Device type, part of device ID, used to verify the memory device used.
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dev-density:
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type: int
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required: true
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description: |
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Device density, part of device ID, used to verify the memory device used.
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[7:0] should reflect the density value itself and [15:8] should reflect
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the mask that should be applied to the returned device ID value.
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This is because part of its byte value might contain invalid bits.
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dev-id:
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type: int
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required: true
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description: |
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Manufacturer ID, part of device ID, used to verify the memory device used.
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reset-delay-us:
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type: int
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required: true
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description: |
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Time in microseconds (us) the memory device can accept the next command following a SW reset.
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read-cs-idle-min-ns:
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type: int
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required: true
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description: |
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Min. time, in nanoseconds, the #CS line should remain inactive between
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the transmission of two different instructions.
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erase-cs-idle-min-ns:
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type: int
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description: |
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Min. time, in nanoseconds, the #CS line should remain inactive after the execution
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of a write enable, erase, erase suspend or erase resume instruction. This setting
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is not used if is-ram property is present.
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enter-qpi-cmd:
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type: int
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description: |
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Command to enter the QPI mode supported by a memory device
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(should be transmitted in single bus mode).
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exit-qpi-cmd:
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type: int
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description: |
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Command to exit the QPI mode supported by a memory device
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(should be transmitted in quad bus mode).
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enter-qpi-mode:
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type: boolean
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description: |
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If present, the memory device will enter the QPI mode which typically reflects that
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all bytes be sent in quad bus mode. It's a pre-requisite that read and write
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commands, that should be read-cmd and write-cmd respectively, reflect the QPI mode.
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read-cmd:
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type: int
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default: 0x03
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description: |
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Read command for single/burst read accesses in auto mode. Default value is the opcode
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for single mode which is supported by all memory devices.
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write-cmd:
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type: int
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default: 0x02
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description: |
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Write command for single/burst write accesses in auto mode. Default value is the opcode
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for single mode which is supported by all memory devices.
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clock-mode:
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type: string
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enum:
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- "spi-mode0"
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- "spi-mode3"
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default: "spi-mode0"
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description: |
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Clock mode when #CS is idle/inactive
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- Mode0: #CLK is low when #CS is inactive
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- Mode3: #CLK is high when #CS is inactive
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Mode0 is selected by default as it should be supported by all memory devices.
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addr-range:
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type: string
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enum:
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- "addr-range-24bit"
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- "addr-range-32bit"
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default: "addr-range-24bit"
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description: |
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Address size to use in auto mode. In 24-bit mode up to 16MB can be
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accessed whilst in 32-bit mode up to 32MB can be accessed which is
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the max. address space supported by QSPICx. Default value is 24-bit
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mode which is supported by all memory devices.
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clock-div:
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type: int
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description: |
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Clock divider for QSPIC2 controller. The clock path of
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this block is always DIV1 which reflects the current
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system clock.
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tcem-max-us:
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type: int
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description: |
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If a non zero value is applied, then Tcem should be taken into
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consideration by QSPIC2 so that it can split a burst read/write
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access in case the total time exceeds the defined value
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(at the cost of extra cycles required for re-sending the instruction,
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address and dummy bytes, if any). This setting is meaningful only if
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is-ram is present. This value reflects the max. time in microseconds
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the #CS line can be driven low in a write/read burst access
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(required for the auto-refresh mechanism, when supported).
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dummy-bytes-count:
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type: string
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required: true
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enum:
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- "dummy-bytes-count0"
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- "dummy-bytes-count1"
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- "dummy-bytes-count2"
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- "dummy-bytes-count4"
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description: |
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Number of dummy bytes to send for single/burst read access in auto mode.
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extra-byte-enable:
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type: boolean
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description: |
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If present, the extra byte will be sent after the dummy bytes, if any.
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This should be useful if 3 dummy bytes are required. In such a case,
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dummy-bytes-count should be set to 2.
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extra-byte:
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type: int
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description: |
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Extra byte to be sent, if extra-byte-enable is present.
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rx-addr-mode:
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type: string
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enum:
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- "single-spi"
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- "dual-spi"
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- "quad-spi"
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default: "single-spi"
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description: |
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Describes the mode of SPI bus during the address phase for single/burst
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read accesses in auto mode. Default value is single mode which should be
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supported by all memory devices.
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rx-inst-mode:
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type: string
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enum:
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- "single-spi"
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- "dual-spi"
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- "quad-spi"
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default: "single-spi"
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description: |
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Describes the mode of SPI bus during the instruction phase for single/burst
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read accesses in auto mode. Default value is single mode which should be
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supported by all memory devices.
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rx-data-mode:
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type: string
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enum:
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- "single-spi"
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- "dual-spi"
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- "quad-spi"
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default: "single-spi"
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description: |
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Describes the mode of SPI bus during the data phase for single/burst
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read accesses in auto mode. Default value is single mode which should
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be supported by all memory devices.
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rx-dummy-mode:
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type: string
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enum:
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- "single-spi"
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- "dual-spi"
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- "quad-spi"
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default: "single-spi"
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description: |
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Describes the mode of SPI bus during the dummy bytes phase for single/burst
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read accesses in auto mode. The single mode should be supported by all
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memory devices.
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rx-extra-mode:
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type: string
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enum:
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- "single-spi"
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- "dual-spi"
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- "quad-spi"
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description: |
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Describes the mode of SPI bus during the extra byte phase for single/burst
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read accesses in auto mode. Default value is single mode which should be
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supported by all memory devices.
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tx-addr-mode:
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type: string
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enum:
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- "single-spi"
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- "dual-spi"
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- "quad-spi"
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default: "single-spi"
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description: |
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Describes the mode of SPI bus during the address phase for single/burst
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write accesses in auto mode. Default value is single mode which should
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be supported by all memory devices.
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tx-inst-mode:
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type: string
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enum:
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- "single-spi"
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- "dual-spi"
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- "quad-spi"
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default: "single-spi"
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description: |
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Describes the mode of SPI bus during the instruction phase for single/burst
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write accesses in auto mode. The single mode should be supported by all
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memory devices.
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tx-data-mode:
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type: string
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enum:
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- "single-spi"
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- "dual-spi"
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- "quad-spi"
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default: "single-spi"
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description: |
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Describes the mode of SPI bus during the data phase for single/burst
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write accesses in auto mode. Default value is single mode which should
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be supported by all memory devices.
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