c5b59282d6
The Cache is an optional configuration of both the ARM Cortex-M7 and Cortex-M55. Previously, it was just checking that it was just an M7 rather than knowing that the CPU actually was built with the cache. Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com> |
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arc | ||
arm | ||
arm64 | ||
common | ||
mips | ||
nios2 | ||
posix | ||
riscv | ||
sparc | ||
x86 | ||
xtensa | ||
CMakeLists.txt | ||
Kconfig |