111 lines
2.7 KiB
C
111 lines
2.7 KiB
C
/*
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* Copyright (c) 2016 Open-RnD Sp. z o.o.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @brief
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*
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* A common driver for STM32 pinmux. Each SoC must implement a SoC
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* specific part of the driver.
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*/
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#include <errno.h>
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#include <nanokernel.h>
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#include <device.h>
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#include <soc.h>
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#include "pinmux.h"
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#include <pinmux.h>
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#include <gpio/gpio_stm32.h>
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#include <clock_control/stm32_clock_control.h>
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#include <pinmux/stm32/pinmux_stm32.h>
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/**
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* @brief enable IO port clock
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*
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* @param port I/O port ID
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* @param clk optional clock device
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*
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* @return 0 on success, error otherwise
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*/
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static int enable_port(uint32_t port, struct device *clk)
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{
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clock_control_subsys_t subsys = stm32_get_port_clock(port);
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/* enable port clock */
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if (!clk) {
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clk = device_get_binding(STM32_CLOCK_CONTROL_NAME);
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}
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return clock_control_on(clk, subsys);
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}
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static int stm32_pin_configure(int pin, int func)
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{
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/* determine IO port registers location */
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uint32_t offset = STM32_PORT(pin) * GPIO_REG_SIZE;
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uint8_t *port_base = (uint8_t *)(GPIO_PORTS_BASE + offset);
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/* not much here, on STM32F10x the alternate function is
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* controller by setting up GPIO pins in specific mode.
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*/
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return stm32_gpio_configure((uint32_t *)port_base, STM32_PIN(pin), func);
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}
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/**
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* @brief pin setup
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*
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* @param pin STM32PIN() encoded pin ID
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* @param func SoC specific function assignment
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* @param clk optional clock device
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*
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* @return 0 on success, error otherwise
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*/
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int _pinmux_stm32_set(uint32_t pin, uint32_t func,
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struct device *clk)
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{
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int config;
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/* make sure to enable port clock first */
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if (enable_port(STM32_PORT(pin), clk)) {
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return -EIO;
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}
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/* determine config for alternate function */
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config = stm32_get_pin_config(pin, func);
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return stm32_pin_configure(pin, config);
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}
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/**
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* @brief setup pins according to their assignments
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*
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* @param pinconf board pin configuration array
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* @param pins array size
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*/
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void stm32_setup_pins(const struct pin_config *pinconf,
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size_t pins)
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{
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struct device *clk;
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int i;
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clk = device_get_binding(STM32_CLOCK_CONTROL_NAME);
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for (i = 0; i < pins; i++) {
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_pinmux_stm32_set(pinconf[i].pin_num,
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pinconf[i].mode, clk);
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}
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}
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