100 lines
3.3 KiB
C
100 lines
3.3 KiB
C
/* pinmux_board_frdm_k64f.c - pin out mapping for the Freescale FRDM-K64F board */
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/*
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* Copyright (c) 2016 Intel Corporation
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <nanokernel.h>
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#include <device.h>
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#include <init.h>
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#include <sys_io.h>
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#include <pinmux.h>
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#include <pinmux/pinmux.h>
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#include "pinmux_k64.h"
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/*
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* I/O pin configuration
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*/
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/*
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* Number of default pin settings, used for Arduino Rev 3 pinout.
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*
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* NOTE: The FRDM-K64F board routes the PTA0/1/2 pins for JTAG/SWD signals that
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* are used for the OpenSDAv2 debug interface. These pins are also routed to
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* the Arduino header pins as D8, D3 and D5, respectively.
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* Since the K64 MCU configures these pins for JTAG/SWD signaling at reset,
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* they should only be re-configured if the debug interface is not used.
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*/
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#ifndef CONFIG_PRESERVE_JTAG_IO_PINS
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#define NUM_DFLT_PINS_SET 22
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#else
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#define NUM_DFLT_PINS_SET (22 - 3)
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#endif
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/*
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* Alter this table to change the default Arduino pin settings on the Freescale
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* FRDM-K64F boards. Specifically, change the PINMUX_* values to represent
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* the functionality desired.
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*/
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struct pin_config mux_config[NUM_DFLT_PINS_SET] = {
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/* pin, selected mode */
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{ K64_PIN_PTC16, K64_PINMUX_FUNC_GPIO },
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{ K64_PIN_PTC17, K64_PINMUX_FUNC_GPIO },
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{ K64_PIN_PTB9, K64_PINMUX_FUNC_GPIO },
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#ifndef CONFIG_PRESERVE_JTAG_IO_PINS
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{ K64_PIN_PTA1, K64_PINMUX_FUNC_GPIO },
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#endif
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{ K64_PIN_PTB23, K64_PINMUX_FUNC_GPIO },
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#ifndef CONFIG_PRESERVE_JTAG_IO_PINS
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{ K64_PIN_PTA2, K64_PINMUX_FUNC_GPIO },
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#endif
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{ K64_PIN_PTC2, K64_PINMUX_FUNC_GPIO },
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{ K64_PIN_PTC3, K64_PINMUX_FUNC_GPIO },
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#ifndef CONFIG_PRESERVE_JTAG_IO_PINS
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{ K64_PIN_PTA0, K64_PINMUX_FUNC_GPIO },
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#endif
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{ K64_PIN_PTC4, K64_PINMUX_FUNC_GPIO },
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{ K64_PIN_PTD0, K64_PINMUX_FUNC_GPIO },
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{ K64_PIN_PTD2, K64_PINMUX_FUNC_GPIO },
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{ K64_PIN_PTD3, K64_PINMUX_FUNC_GPIO },
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{ K64_PIN_PTD1, K64_PINMUX_FUNC_GPIO },
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/* I2C0_SDA */
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{ K64_PIN_PTE25, (K64_PINMUX_ALT_5 | K64_PINMUX_OPEN_DRN_ENABLE) },
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/* I2C0_SCL */
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{ K64_PIN_PTE24, (K64_PINMUX_ALT_5 | K64_PINMUX_OPEN_DRN_ENABLE) },
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{ K64_PIN_PTB2, K64_PINMUX_FUNC_ANALOG }, /* ADC0_SE12/Analog In 0 */
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{ K64_PIN_PTB3, K64_PINMUX_FUNC_ANALOG }, /* ADC0_SE13/Analog In 1 */
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{ K64_PIN_PTB10, K64_PINMUX_FUNC_ANALOG }, /* ADC1_SE14/Analog In 2 */
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{ K64_PIN_PTB11, K64_PINMUX_FUNC_ANALOG }, /* ADC1_SE15/Analog In 3 */
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{ K64_PIN_PTC11, K64_PINMUX_FUNC_ANALOG }, /* ADC1_SE7b/Analog In 4 */
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{ K64_PIN_PTC10, K64_PINMUX_FUNC_ANALOG }, /* ADC1_SE6b/Analog In 5 */
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};
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int fsl_frdm_k64f_pin_init(struct device *arg)
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{
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ARG_UNUSED(arg);
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/* configure the pins from the default mapping above */
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for (int i = 0; i < NUM_DFLT_PINS_SET; i++) {
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_fsl_k64_set_pin(mux_config[i].pin_num, mux_config[i].mode);
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}
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return 0;
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}
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SYS_INIT(fsl_frdm_k64f_pin_init, SECONDARY, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
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