Chuck Jordan 7f637af2bd spi: For spi_dw, added SPI_DW_FIFO_DEPTH as configurable paramter ... When using the Synopsys DesignWare Synchronous Serial Interface (SSI), the FIFO depth can vary from 2-256, depending upon how this module is built. For quark_se_ss, it was using a depth of 8. For EM Starterkit, it will be 32. Adding this now as a configurable option. A larger FIFO really helps reduce SPI interrupts. Change-Id: Id2bc8470bfc08ab447d38b89c7904cff010c63bd Signed-off-by: Chuck Jordan <cjordan@synopsys.com>		2016-05-19 01:24:57 +00:00
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Kbuild	arc: move vector and sw isr table to core code	2016-03-08 09:58:20 -08:00
Kconfig.defconfig	spi: For spi_dw, added SPI_DW_FIFO_DEPTH as configurable paramter	2016-05-19 01:24:57 +00:00
Kconfig.soc	power_mgmt: Make names consistent with new RFC	2016-03-26 14:35:11 -04:00
Makefile	Move compiler optimization to the SoC	2016-02-05 20:25:29 -05:00
linker.ld	build: rename non-generated linker scripts to .ld extension	2016-05-09 18:09:26 +00:00
soc.c	init: use SYS_INIT() where it makes sense	2016-02-05 20:25:25 -05:00
soc.h	spi: consalidate and simplify	2016-05-12 10:57:26 +00:00
soc_config.c	ipm: convert to use DEVICE_AND_API_INIT()	2016-04-15 22:06:16 +00:00