Pawel Czarnecki 98fd9d0975 boards/dts: riscv: litex_vexriscv: add clock control driver to devicetree ... This extends litex_vexriscv.dts file by adding clock controller nodes. Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>		2020-12-06 12:35:16 -05:00
..
hifive1	device: Const-ify all device driver instance pointers	2020-09-02 13:48:13 +02:00
hifive1_revb	boards: hifive1_revb: add support for memory protection features	2020-11-09 15:37:11 -05:00
litex_vexriscv	boards/dts: riscv: litex_vexriscv: add clock control driver to devicetree	2020-12-06 12:35:16 -05:00
m2gl025_miv	drivers: uart: miv: convert to DT_INST defines	2020-03-11 16:37:22 -06:00
qemu_riscv32	boards: centralize QEMU icount management	2020-06-24 20:28:36 -04:00
qemu_riscv64	boards: centralize QEMU icount management	2020-06-24 20:28:36 -04:00
rv32m1_vega	device: Const-ify all device driver instance pointers	2020-09-02 13:48:13 +02:00
index.rst	…