126 lines
2.4 KiB
Plaintext
126 lines
2.4 KiB
Plaintext
/*
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* Copyright (c) 2020 Linumiz
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* Author: Parthiban Nallathambi <parthiban@linumiz.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <zephyr/dt-bindings/gpio/gpio.h>
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#include <zephyr/dt-bindings/gpio/infineon-xmc4xxx-gpio.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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compatible = "arm,cortex-m4f";
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reg = <0>;
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};
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};
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/* TODO: Add psram1 & dsram2 to MEMORY layout of linker */
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psram1: memory@10000000 {
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compatible = "mmio-sram";
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};
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dsram1: memory@20000000 {
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compatible = "mmio-sram";
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};
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dsram2: memory@30000000 {
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compatible = "mmio-sram";
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};
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flash_controller: flash_controller@58001000 {
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compatible = "infineon,xmc4xxx-flash-controller";
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reg = <0x58001000 0x1400>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@c000000 {
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compatible = "infineon,xmc4xxx-nv-flash","soc-nv-flash";
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write-block-size = <256>;
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};
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};
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sysclk: system-clock {
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compatible = "fixed-clock";
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clock-frequency = <120000000>;
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#clock-cells = <0>;
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};
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soc {
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pinctrl: pinctrl@48028000 {
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compatible = "infineon,xmc4xxx-pinctrl";
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#address-cells = <1>;
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#size-cells = <1>;
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gpio0: gpio@48028000 {
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compatible = "infineon,xmc4xxx-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x48028000 0x100>;
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status = "disabled";
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};
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gpio1: gpio@48028100 {
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compatible = "infineon,xmc4xxx-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x48028100 0x100>;
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status = "disabled";
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};
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gpio2: gpio@48028200 {
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compatible = "infineon,xmc4xxx-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x48028200 0x100>;
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status = "disabled";
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};
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};
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usic0ch0: usic@40030000 {
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reg = <0x40030000 0x1ff>;
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clocks = <&sysclk>;
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status = "disabled";
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};
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usic0ch1: usic@40030200 {
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reg = <0x40030200 0x1ff>;
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clocks = <&sysclk>;
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status = "disabled";
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};
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usic1ch0: usic@48020000 {
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reg = <0x48020000 0x1ff>;
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clocks = <&sysclk>;
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status = "disabled";
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};
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usic1ch1: usic@48020200 {
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reg = <0x48020200 0x1ff>;
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clocks = <&sysclk>;
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status = "disabled";
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};
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usic2ch0: usic@48024000 {
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reg = <0x48024000 0x1ff>;
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clocks = <&sysclk>;
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status = "disabled";
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};
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usic2ch1: usic@48024200 {
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reg = <0x48024200 0x1ff>;
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clocks = <&sysclk>;
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status = "disabled";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <6>;
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};
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