74 lines
1.3 KiB
Plaintext
74 lines
1.3 KiB
Plaintext
/*
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* Copyright (c) 2022 Nordic Semiconductor
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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uart0_default: uart0_default {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 7)>,
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<NRF_PSEL(UART_RX, 0, 6)>;
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};
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};
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uart0_sleep: uart0_sleep {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 7)>,
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<NRF_PSEL(UART_RX, 0, 6)>;
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low-power-enable;
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};
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};
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uart1_default: uart1_default {
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group1 {
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psels = <NRF_PSEL(UART_RX, 0, 20)>,
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<NRF_PSEL(UART_TX, 0, 24)>,
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<NRF_PSEL(UART_RTS, 0, 17)>,
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<NRF_PSEL(UART_CTS, 0, 16)>;
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};
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};
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uart1_sleep: uart1_sleep {
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group1 {
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psels = <NRF_PSEL(UART_RX, 0, 20)>,
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<NRF_PSEL(UART_TX, 0, 24)>,
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<NRF_PSEL(UART_RTS, 0, 17)>,
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<NRF_PSEL(UART_CTS, 0, 16)>;
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low-power-enable;
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};
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};
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i2c0_default: i2c0_default {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 27)>,
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<NRF_PSEL(TWIM_SCL, 0, 26)>;
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};
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};
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i2c0_sleep: i2c0_sleep {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 27)>,
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<NRF_PSEL(TWIM_SCL, 0, 26)>;
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low-power-enable;
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};
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};
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spi2_default: spi2_default {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
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<NRF_PSEL(SPIM_MOSI, 0, 23)>,
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<NRF_PSEL(SPIM_MISO, 0, 21)>;
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};
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};
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spi2_sleep: spi2_sleep {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
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<NRF_PSEL(SPIM_MOSI, 0, 23)>,
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<NRF_PSEL(SPIM_MISO, 0, 21)>;
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low-power-enable;
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};
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};
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};
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