88 lines
1.5 KiB
Plaintext
88 lines
1.5 KiB
Plaintext
/*
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* Copyright (c) 2022 Nordic Semiconductor
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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uart1_default: uart1_default {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 24)>,
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<NRF_PSEL(UART_RX, 0, 23)>;
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};
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};
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uart1_sleep: uart1_sleep {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 24)>,
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<NRF_PSEL(UART_RX, 0, 23)>;
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low-power-enable;
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};
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};
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uart2_default: uart2_default {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 4)>,
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<NRF_PSEL(UART_RX, 0, 5)>;
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};
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};
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uart2_sleep: uart2_sleep {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 4)>,
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<NRF_PSEL(UART_RX, 0, 5)>;
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low-power-enable;
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};
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};
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i2c2_default: i2c2_default {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
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<NRF_PSEL(TWIM_SCL, 0, 27)>;
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};
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};
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i2c2_sleep: i2c2_sleep {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
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<NRF_PSEL(TWIM_SCL, 0, 27)>;
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low-power-enable;
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};
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};
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spi3_default: spi3_default {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 0, 20)>,
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<NRF_PSEL(SPIM_MOSI, 0, 21)>,
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<NRF_PSEL(SPIM_MISO, 0, 22)>;
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};
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};
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spi3_sleep: spi3_sleep {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 0, 20)>,
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<NRF_PSEL(SPIM_MOSI, 0, 21)>,
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<NRF_PSEL(SPIM_MISO, 0, 22)>;
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low-power-enable;
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};
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};
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pwm0_default: pwm0_default {
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group1 {
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psels = <NRF_PSEL(PWM_OUT0, 0, 10)>,
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<NRF_PSEL(PWM_OUT1, 0, 11)>,
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<NRF_PSEL(PWM_OUT2, 0, 12)>;
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nordic,invert;
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};
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};
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pwm0_sleep: pwm0_sleep {
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group1 {
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psels = <NRF_PSEL(PWM_OUT0, 0, 10)>,
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<NRF_PSEL(PWM_OUT1, 0, 11)>,
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<NRF_PSEL(PWM_OUT2, 0, 12)>;
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low-power-enable;
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};
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};
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};
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