zephyr/soc/riscv/riscv-privilege/telink_b91/soc.h

17 lines
358 B
C

/*
* Copyright (c) 2021 Telink Semiconductor
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef RISCV_TELINK_B91_SOC_H
#define RISCV_TELINK_B91_SOC_H
#include <soc_common.h>
/* Machine timer memory-mapped registers */
#define RISCV_MTIME_BASE 0xE6000000
#define RISCV_MTIMECMP_BASE 0xE6000008
#endif /* RISCV_TELINK_B91_SOC_H */