51 lines
1.4 KiB
C
51 lines
1.4 KiB
C
/*
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* Copyright (c) 2021 Microchip Technology Inc. and its subsidiaries.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _MEC172X_EMI_H
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#define _MEC172X_EMI_H
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#include <stdint.h>
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#include <stddef.h>
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/** @brief Embedded Memory Interface (EMI) Registers */
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struct emi_regs {
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volatile uint8_t RT_HOST_TO_EC;
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volatile uint8_t RT_EC_TO_HOST;
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volatile uint8_t EC_ADDR_LSB;
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volatile uint8_t EC_ADDR_MSB;
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volatile uint8_t EC_DATA_0; /* +0x04 */
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volatile uint8_t EC_DATA_1;
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volatile uint8_t EC_DATA_2;
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volatile uint8_t EC_DATA_3;
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volatile uint8_t INTR_SRC_LSB; /* +0x08 */
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volatile uint8_t INTR_SRC_MSB;
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volatile uint8_t INTR_MSK_LSB;
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volatile uint8_t INTR_MSK_MSB;
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volatile uint8_t APPID; /* +0x0C */
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uint8_t RSVD1[3];
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volatile uint8_t APPID_ASSGN; /* +0x10 */
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uint8_t RSVD2[3];
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uint32_t RSVD3[(0x100 - 0x14) / 4];
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volatile uint8_t HOST_TO_EC; /* +0x100 */
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volatile uint8_t EC_TO_HOST;
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uint16_t RSVD4[1];
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volatile uint32_t MEM_BA_0; /* +0x104 */
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volatile uint16_t MEM_RL_0; /* +0x108 */
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volatile uint16_t MEM_WL_0;
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volatile uint32_t MEM_BA_1; /* +0x10C */
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volatile uint16_t MEM_RL_1; /* +0x110 */
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volatile uint16_t MEM_WL_1;
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volatile uint16_t INTR_SET; /* +0x114 */
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volatile uint16_t HOST_CLR_EN; /* +0x116 */
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uint32_t RSVD5[2];
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volatile uint32_t APPID_STS_1; /* +0x120 */
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volatile uint32_t APPID_STS_2;
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volatile uint32_t APPID_STS_3;
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volatile uint32_t APPID_STS_4;
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};
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#endif /* #ifndef _MEC172X_EMI_H */
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