50 lines
850 B
Plaintext
50 lines
850 B
Plaintext
#include <arm/armv7-m.dtsi>
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#include <nordic/mem.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4f";
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reg = <0>;
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};
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};
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flash-controller@4001E000 {
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compatible = "nrf,nrf52-flash-controller";
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reg = <0x4001E000 0x550>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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reg = <0x00000000 DT_FLASH_SIZE>;
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write-block-size = <4>;
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};
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};
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sram0: memory@20000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x20000000 DT_SRAM_SIZE>;
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};
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soc {
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uart0: uart@40002000 {
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compatible = "nordic,nrf-uarte", "nordic,nrf-uart";
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reg = <0x40002000 0x1000>;
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interrupts = <2 1>;
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status = "disabled";
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label = "UART_0";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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