zephyr/dts/arm/atmel/sam4s.dtsi

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/*
* Copyright (c) 2017 Justin Watson
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <arm/armv7-m.dtsi>
#include <dt-bindings/i2c/i2c.h>
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m4";
reg = <0>;
};
};
sram0: memory@20100000 {
device_type = "memory";
compatible = "mmio-sram";
reg = <0x20100000 0x20000>;
};
flash0: flash@400000 {
reg = <0x00400000 0x100000>;
};
soc {
i2c0: i2c@40018000 {
compatible = "atmel,sam-i2c-twi";
clock-frequency = <I2C_BITRATE_STANDARD>;
reg = <0x40018000 0x128>;
interrupts = <19 0>;
peripheral-id = <19>;
label = "I2C_0";
status = "disabled";
};
i2c1: i2c@4001C000 {
compatible = "atmel,sam-i2c-twi";
clock-frequency = <I2C_BITRATE_STANDARD>;
reg = <0x4001C000 0x128>;
interrupts = <20 0>;
peripheral-id = <20>;
label = "I2C_1";
status = "disabled";
};
uart0: uart@400E0600 {
compatible = "atmel,sam-uart";
reg = <0x400E0600 0x200>;
interrupts = <8 0>;
peripheral-id = <8>;
status = "disabled";
label = "UART_0";
};
uart1: uart@400E0800 {
compatible = "atmel,sam-uart";
reg = <0x400E0800 0x200>;
interrupts = <9 0>;
peripheral-id = <9>;
status = "disabled";
label = "UART_1";
};
usart0: usart@40024000 {
compatible = "atmel,sam-usart";
reg = <0x40024000 0x130>;
interrupts = <14 0>;
peripheral-id = <14>;
status = "disabled";
label = "USART_0";
};
usart1: usart@40028000 {
compatible = "atmel,sam-usart";
reg = <0x40028000 0x130>;
interrupts = <15 0>;
peripheral-id = <15>;
status = "disabled";
label = "USART_1";
};
};
};
&nvic {
arm,num-irq-priority-bits = <4>;
};