Gerard Marull-Paretas 009f3e3669 dts: riscv: nordic: nrf54h20: introduce cpuflpr ... Add a new base devicetree file for the FLPR core. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>		2024-08-06 14:32:40 +02:00
..
andes	…
efinix	dts: riscv: Fix incorrect plic size	2024-07-02 22:21:17 -04:00
espressif	dma: esp32c6: Added support to GDMA	2024-08-02 18:48:37 -05:00
gd	…
ite	…
lowrisc	…
microchip	…
niosv	…
nordic	dts: riscv: nordic: nrf54h20: introduce cpuflpr	2024-08-06 14:32:40 +02:00
openisa	soc/openisa: enable the `C` extension	2024-07-03 15:06:14 -04:00
qemu	…
sifive	…
starfive	…
telink	…
neorv32.dtsi	…
renode_riscv32_virt.dtsi	…
riscv32-litex-vexriscv.dtsi	drivers: ethernet: litex: add phy	2024-08-05 16:29:06 +02:00