zephyr/drivers/clock_control
Erwan Gouriou de684bbdaa clock_control: fix to get PLL2 source for PREDV1 working
Some fixes where needed to get PLL2 source of PREVI1 functional.
Compiled ok with following configuration:
CONFIG_CLOCK_STM32F10X_CONN_LINE_PREDIV1_SRC_PLL2CLK=y
CONFIG_CLOCK_STM32F10X_CONN_LINE_PREDIV2=0
CONFIG_CLOCK_STM32F10X_CONN_LINE_PLL2_MULTIPLIER=8

Jira: ZEP-1758

Change-Id: I5ddfaef1b44c4c4e5e6adedc158a1c9092bc8df5
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-02-22 18:09:22 -06:00
..
Kconfig clock control: clean up after stm32cube LL driver 2017-02-10 14:47:41 -06:00
Kconfig.beetle license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
Kconfig.nrf5 license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
Kconfig.quark_se license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
Kconfig.stm32 clock control:stm32: provide STM32Cube LL based driver 2017-02-10 14:47:41 -06:00
Kconfig.stm32f4x license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
Kconfig.stm32f10x license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
Kconfig.stm32f107xx license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
Makefile clock control: clean up after stm32cube LL driver 2017-02-10 14:47:41 -06:00
beetle_clock_control.c license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
nrf5_power_clock.c clock_control: nrf5_power: Use CMSIS NVIC APIs directly 2017-01-23 15:15:55 -06:00
quark_se_clock_control.c license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
stm32_ll_clock.c clock_control: stm32: code optimization 2017-02-10 14:47:41 -06:00
stm32_ll_clock.h clock_control: stm32: code optimization 2017-02-10 14:47:41 -06:00
stm32f3x_ll_clock.c clock control:stm32: provide STM32Cube LL based driver 2017-02-10 14:47:41 -06:00
stm32f4x_clock.c license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
stm32f10x_clock.c license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
stm32f107xx_clock.c clock_control: fix to get PLL2 source for PREDV1 working 2017-02-22 18:09:22 -06:00
stm32l4x_ll_clock.c clock_control: stm32: code optimization 2017-02-10 14:47:41 -06:00