38 lines
812 B
Plaintext
38 lines
812 B
Plaintext
/*
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* Copyright (c) 2020 Sebastian Schwabe <sebastian.schwabe@mailbox.tu-dresden.de>
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* Fabian Paschke <fabian.paschke@eas.iis.fraunhofer.de>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <st/f3/stm32f303.dtsi>
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/ {
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ccm0: memory@10000000 {
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compatible = "zephyr,memory-region", "st,stm32-ccm";
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reg = <0x10000000 DT_SIZE_K(8)>;
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zephyr,memory-region = "CCM";
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};
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(12)>;
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};
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soc {
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flash-controller@40022000 {
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flash0: flash@8000000 {
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reg = <0x08000000 DT_SIZE_K(64)>;
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};
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};
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dac2: dac@40009800 {
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compatible = "st,stm32-dac";
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reg = <0x40009800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x04000000>;
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status = "disabled";
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label = "DAC_2";
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#io-channel-cells = <1>;
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};
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};
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};
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