zephyr/soc/xtensa
Flavio Ceolin 8cb9d76553 xtensa: dc233c: Add TLS support
Add TLS support for this target.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-14 17:07:21 -04:00
..
dc233c xtensa: dc233c: Add TLS support 2023-09-14 17:07:21 -04:00
espressif_esp32 soc: espressif: adjust memory organization on linker 2023-08-31 14:08:41 +02:00
intel_adsp dai: intel: dmic: New functions for writing fir coefficients 2023-09-04 15:30:00 -04:00
nxp_adsp soc: xtensa: nxp: add resource_table section in linker script 2023-07-26 14:33:36 +02:00
sample_controller xtensa: sample_controller: smaller intermediate build artifacts 2023-08-22 10:00:46 +02:00
CMakeLists.txt