20 lines
945 B
Plaintext
20 lines
945 B
Plaintext
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_UART_MCUX_0_BAUD_RATE NXP_K64F_UART_4006A000_BAUD_RATE
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#define CONFIG_UART_MCUX_0_IRQ_PRI NXP_K64F_UART_4006A000_IRQ_0_PRIORITY
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#define CONFIG_UART_MCUX_1_BAUD_RATE NXP_K64F_UART_4006B000_BAUD_RATE
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#define CONFIG_UART_MCUX_1_IRQ_PRI NXP_K64F_UART_4006B000_IRQ_0_PRIORITY
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#define CONFIG_UART_MCUX_2_BAUD_RATE NXP_K64F_UART_4006C000_BAUD_RATE
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#define CONFIG_UART_MCUX_2_IRQ_PRI NXP_K64F_UART_4006C000_IRQ_0_PRIORITY
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#define CONFIG_UART_MCUX_3_BAUD_RATE NXP_K64F_UART_4006D000_BAUD_RATE
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#define CONFIG_UART_MCUX_3_IRQ_PRI NXP_K64F_UART_4006D000_IRQ_0_PRIORITY
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#define CONFIG_UART_MCUX_4_BAUD_RATE NXP_K64F_UART_400EA000_BAUD_RATE
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#define CONFIG_UART_MCUX_4_IRQ_PRI NXP_K64F_UART_400EA000_IRQ_0_PRIORITY
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#define CONFIG_UART_MCUX_5_BAUD_RATE NXP_K64F_UART_400EB000_BAUD_RATE
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#define CONFIG_UART_MCUX_5_IRQ_PRI NXP_K64F_UART_400EB000_IRQ_0_PRIORITY
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