30 lines
580 B
Plaintext
30 lines
580 B
Plaintext
/*
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* Copyright (c) 2021, Laird Connectivity
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/devicetree.h>
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MEMORY
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{
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#if defined(CONFIG_CODE_DDR)
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DDR (wx) : ORIGIN = 0x80400000, LENGTH = 0x00C00000
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#else
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DDR (wx) : ORIGIN = 0x80000000, LENGTH = 0x01000000
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#endif
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}
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#include <zephyr/arch/arm/aarch32/cortex_m/scripts/linker.ld>
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SECTIONS
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{
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#ifdef CONFIG_OPENAMP_RSC_TABLE
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SECTION_PROLOGUE(.resource_table,, SUBALIGN(4))
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{
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KEEP(*(.resource_table*))
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} GROUP_LINK_IN(ROMABLE_REGION)
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#endif
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}
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