89 lines
2.0 KiB
Plaintext
89 lines
2.0 KiB
Plaintext
/*
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* Copyright 2023, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/dt-bindings/display/panel.h>
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/{
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chosen {
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zephyr,display = &lcdif;
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};
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en_mipi_display_rk055hdmipi4ma0: enable-mipi-display-rk055hdmipi4ma0 {
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compatible = "regulator-fixed";
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regulator-name = "en_mipi_display";
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enable-gpios = <&nxp_mipi_connector 32 GPIO_ACTIVE_HIGH>;
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regulator-boot-on;
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};
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lvgl_pointer {
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compatible = "zephyr,lvgl-pointer-input";
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input = <>911_rk055hdmipi4ma0>;
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};
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};
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&nxp_mipi_i2c {
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status = "okay";
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gt911_rk055hdmipi4ma0: gt911-rk055hdmipi4ma0@5d {
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compatible = "goodix,gt911";
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reg = <0x5d>;
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irq-gpios = <&nxp_mipi_connector 29 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&nxp_mipi_connector 28 GPIO_ACTIVE_HIGH>;
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};
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};
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&zephyr_lcdif {
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status = "okay";
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width = <720>;
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height = <1280>;
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display-timings {
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compatible = "zephyr,panel-timing";
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hsync-len = <6>;
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hfront-porch = <12>;
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hback-porch = <24>;
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vsync-len = <2>;
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vfront-porch = <16>;
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vback-porch = <14>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <1>;
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/*
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* Pixel clock is given by the following formula:
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* (height + vsync-len + vfront-porch + vback-porch) *
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* (width + hsync-len + hfront-porch + hback-porch) * frame rate
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*/
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clock-frequency = <62346240>;
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};
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pixel-format = <PANEL_PIXEL_FORMAT_BGR_565>;
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data-bus-width = "24-bit";
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backlight-gpios = <&nxp_mipi_connector 0 GPIO_ACTIVE_HIGH>;
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};
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&zephyr_mipi_dsi {
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status = "okay";
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nxp,lcdif = <&lcdif>;
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dpi-color-coding = "24-bit";
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dpi-pixel-packet = "24-bit";
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dpi-video-mode = "burst";
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dpi-bllp-mode = "low-power";
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autoinsert-eotp;
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/*
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* PHY clock is given by the following formula:
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* (pixel clock * bits per pixel) / MIPI data lanes
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*/
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phy-clock = <748154880>;
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hx8394-rk055hdmipi4ma0@0 {
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status = "okay";
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compatible = "himax,hx8394";
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reg = <0x0>;
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reset-gpios = <&nxp_mipi_connector 21 GPIO_ACTIVE_HIGH>;
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data-lanes = <2>;
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width = <720>;
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height = <1280>;
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pixel-format = <MIPI_DSI_PIXFMT_RGB565>;
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};
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};
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