58 lines
1.6 KiB
ArmAsm
58 lines
1.6 KiB
ArmAsm
/*
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* Copyright (c) 2019 Intel Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/arch/x86/multiboot.h>
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#include <zephyr/devicetree.h>
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/*
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* This is included by ia32/crt0.S and intel64/locore.S
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* at their 32-bit entry points to cover common ground.
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*/
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#ifdef CONFIG_MULTIBOOT_INFO
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/*
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* If we were loaded by a multiboot-compliant loader, then EAX
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* contains MULTIBOOT_EAX_MAGIC and EBX points to a valid 'struct
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* multiboot_info'; otherwise EBX is just junk. Check EAX early
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* before it's clobbered and leave a sentinel (0) in EBX if invalid.
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* The valid in EBX will be the argument to z_x86_prep_c(), so the
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* subsequent code must, of course, be sure to preserve it meanwhile.
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*/
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cmpl $MULTIBOOT_EAX_MAGIC, %eax
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je 1f
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xorl %ebx, %ebx
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1:
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#endif
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#ifdef CONFIG_PIC_DISABLE
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/*
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* "Disable" legacy i8259 interrupt controllers. Note that we
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* can't actually disable them, but we mask all their interrupt
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* sources which is effectively the same thing (almost).
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*/
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movb $0xff, %al
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outb %al, $0x21
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outb %al, $0xA1
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#endif
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#ifdef CONFIG_MULTIBOOT
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jmp 1f
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.align 4
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.long MULTIBOOT_HEADER_MAGIC
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.long MULTIBOOT_HEADER_FLAGS
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.long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
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#if DT_HAS_COMPAT_STATUS_OKAY(intel_multiboot_framebuffer)
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.fill 5,4,0 /* (unused exec layout) */
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.long 0 /* linear graphics mode */
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.long DT_PROP(DT_INST(0, intel_multiboot_framebuffer), width) /* width */
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.long DT_PROP(DT_INST(0, intel_multiboot_framebuffer), height) /* height */
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.long 32 /* depth */
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#endif
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1:
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#endif
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