53a4acb2dc
This change adds full shared floating point support for the SPARC architecture. All SPARC floating point registers are scratch registers with respect to function call boundaries. That means we only have to save floating point registers when switching threads in ISR. The registers are stored to the corresponding thread stack. FPU is disabled when calling ISR. Any attempt to use FPU in ISR will generate the fp_disabled trap which causes Zephyr fatal error. - This commit adds no new thread state. - All FPU contest save/restore is synchronous and lazy FPU context switch is not implemented. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com> |
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| .. | ||
| offsets | ||
| CMakeLists.txt | ||
| fatal.c | ||
| fault_trap.S | ||
| interrupt_trap.S | ||
| irq_manage.c | ||
| irq_offload.c | ||
| prep_c.c | ||
| reset_trap.S | ||
| stack_offsets.h | ||
| sw_trap_set_pil.S | ||
| switch.S | ||
| thread.c | ||
| tls.c | ||
| trap_table_mvt.S | ||
| window_trap.S | ||