42 lines
3.9 KiB
C
42 lines
3.9 KiB
C
/*
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* Copyright (c) 2018 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifdef CONFIG_BOARD_FRDM_K64F
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#define DT_WNCM14A2A_UART_DRV_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_BUS_NAME
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#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_POWER_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_POWER_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_POWER_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_POWER_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_RESET_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_RESET_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_RESET_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_RESET_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_PIN
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#ifdef DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_NAME DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_PIN DT_NXP_KINETIS_UART_4006C000_WNC_M14A2A_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
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#endif
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#endif
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#if defined(CONFIG_BOARD_NRF52840_PCA10056) || defined(CONFIG_BOARD_NRF52840_MDK)
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#define DT_WNCM14A2A_UART_DRV_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_BUS_NAME
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#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_POWER_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_POWER_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_POWER_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_POWER_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_RESET_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_RESET_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_RESET_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_RESET_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_PIN
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#ifdef DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
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#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_NAME DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_CONTROLLER
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#define DT_WNCM14A2A_GPIO_MDM_SEND_OK_PIN DT_NORDIC_NRF_UARTE_40028000_WNC_M14A2A_40028000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
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#endif
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#endif
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