412 lines
12 KiB
C
412 lines
12 KiB
C
/*
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* Copyright (c) 2020 Nuvoton Technology Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nuvoton_npcx_uart
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#include <sys/__assert.h>
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#include <drivers/gpio.h>
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#include <drivers/uart.h>
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#include <drivers/clock_control.h>
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#include <kernel.h>
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#include <soc.h>
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#include "soc_miwu.h"
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#include <logging/log.h>
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LOG_MODULE_REGISTER(uart_npcx, LOG_LEVEL_ERR);
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/* Driver config */
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struct uart_npcx_config {
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struct uart_device_config uconf;
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/* clock configuration */
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struct npcx_clk_cfg clk_cfg;
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/* int-mux configuration */
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const struct npcx_wui uart_rx_wui;
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/* pinmux configuration */
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const uint8_t alts_size;
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const struct npcx_alt *alts_list;
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};
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/* Driver data */
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struct uart_npcx_data {
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/* Baud rate */
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uint32_t baud_rate;
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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uart_irq_callback_user_data_t user_cb;
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void *user_data;
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#endif
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};
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/* Driver convenience defines */
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#define DRV_CONFIG(dev) \
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((const struct uart_npcx_config *)(dev)->config)
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#define DRV_DATA(dev) \
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((struct uart_npcx_data *)(dev)->data)
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#define HAL_INSTANCE(dev) \
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(struct uart_reg *)(DRV_CONFIG(dev)->uconf.base)
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/* UART local functions */
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static int uart_npcx_tx_fifo_ready(const struct device *dev)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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/* True if the Tx FIFO is not completely full */
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return !(GET_FIELD(inst->UFTSTS, NPCX_UFTSTS_TEMPTY_LVL) == 0);
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}
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static int uart_npcx_rx_fifo_available(const struct device *dev)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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/* True if at least one byte is in the Rx FIFO */
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return IS_BIT_SET(inst->UFRSTS, NPCX_UFRSTS_RFIFO_NEMPTY_STS);
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}
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static void uart_npcx_dis_all_tx_interrupts(const struct device *dev)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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/* Disable all Tx interrupts */
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inst->UFTCTL &= ~(BIT(NPCX_UFTCTL_TEMPTY_LVL_EN) |
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BIT(NPCX_UFTCTL_TEMPTY_EN) |
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BIT(NPCX_UFTCTL_NXMIPEN));
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}
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static void uart_npcx_clear_rx_fifo(const struct device *dev)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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uint8_t scratch;
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/* Read all dummy bytes out from Rx FIFO */
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while (uart_npcx_rx_fifo_available(dev))
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scratch = inst->URBUF;
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}
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#endif
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/* UART api functions */
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static int uart_npcx_poll_in(const struct device *dev, unsigned char *c)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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/* Rx single byte buffer is not full */
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if (!IS_BIT_SET(inst->UICTRL, NPCX_UICTRL_RBF))
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return -1;
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*c = inst->URBUF;
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return 0;
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}
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static void uart_npcx_poll_out(const struct device *dev, unsigned char c)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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/* Wait while Tx single byte buffer is ready to send */
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while (!IS_BIT_SET(inst->UICTRL, NPCX_UICTRL_TBE))
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continue;
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inst->UTBUF = c;
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}
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static int uart_npcx_err_check(const struct device *dev)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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uint32_t err = 0U;
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uint8_t stat = inst->USTAT;
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if (IS_BIT_SET(stat, NPCX_USTAT_DOE))
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err |= UART_ERROR_OVERRUN;
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if (IS_BIT_SET(stat, NPCX_USTAT_PE))
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err |= UART_ERROR_PARITY;
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if (IS_BIT_SET(stat, NPCX_USTAT_FE))
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err |= UART_ERROR_FRAMING;
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return err;
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}
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static int uart_npcx_fifo_fill(const struct device *dev,
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const uint8_t *tx_data,
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int size)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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uint8_t tx_bytes = 0U;
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/* If Tx FIFO is still ready to send */
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while ((size - tx_bytes > 0) && uart_npcx_tx_fifo_ready(dev)) {
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/* Put a character into Tx FIFO */
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inst->UTBUF = tx_data[tx_bytes++];
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}
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return tx_bytes;
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}
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static int uart_npcx_fifo_read(const struct device *dev, uint8_t *rx_data,
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const int size)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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unsigned int rx_bytes = 0U;
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/* If least one byte is in the Rx FIFO */
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while ((size - rx_bytes > 0) && uart_npcx_rx_fifo_available(dev)) {
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/* Receive one byte from Rx FIFO */
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rx_data[rx_bytes++] = inst->URBUF;
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}
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return rx_bytes;
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}
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static void uart_npcx_irq_tx_enable(const struct device *dev)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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inst->UFTCTL |= BIT(NPCX_UFTCTL_TEMPTY_EN);
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}
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static void uart_npcx_irq_tx_disable(const struct device *dev)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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inst->UFTCTL &= ~(BIT(NPCX_UFTCTL_TEMPTY_EN));
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}
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static int uart_npcx_irq_tx_ready(const struct device *dev)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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/* Tx interrupt is enable and its FIFO is ready to send (not full) */
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return (IS_BIT_SET(inst->UFTCTL, NPCX_UFTCTL_TEMPTY_EN) &&
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uart_npcx_tx_fifo_ready(dev));
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}
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static int uart_npcx_irq_tx_complete(const struct device *dev)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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/* Tx FIFO is empty or last byte is sending */
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return IS_BIT_SET(inst->UFTSTS, NPCX_UFTSTS_NXMIP);
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}
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static void uart_npcx_irq_rx_enable(const struct device *dev)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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inst->UFRCTL |= BIT(NPCX_UFRCTL_RNEMPTY_EN);
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}
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static void uart_npcx_irq_rx_disable(const struct device *dev)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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inst->UFRCTL &= ~(BIT(NPCX_UFRCTL_RNEMPTY_EN));
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}
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static int uart_npcx_irq_rx_ready(const struct device *dev)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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/* Rx interrupt is enable and at least one byte is in its FIFO */
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return (IS_BIT_SET(inst->UFRCTL, NPCX_UFRCTL_RNEMPTY_EN) &&
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uart_npcx_rx_fifo_available(dev));
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}
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static void uart_npcx_irq_err_enable(const struct device *dev)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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inst->UICTRL |= BIT(NPCX_UICTRL_EEI);
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}
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static void uart_npcx_irq_err_disable(const struct device *dev)
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{
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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inst->UICTRL &= ~(BIT(NPCX_UICTRL_EEI));
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}
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static int uart_npcx_irq_is_pending(const struct device *dev)
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{
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return (uart_npcx_irq_tx_ready(dev)
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|| uart_npcx_irq_rx_ready(dev));
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}
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static int uart_npcx_irq_update(const struct device *dev)
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{
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ARG_UNUSED(dev);
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return 1;
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}
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static void uart_npcx_irq_callback_set(const struct device *dev,
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uart_irq_callback_user_data_t cb,
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void *cb_data)
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{
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struct uart_npcx_data *data = DRV_DATA(dev);
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data->user_cb = cb;
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data->user_data = cb_data;
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}
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static void uart_npcx_isr(const struct device *dev)
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{
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struct uart_npcx_data *data = DRV_DATA(dev);
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if (data->user_cb) {
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data->user_cb(dev, data->user_data);
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}
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}
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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/* UART driver registration */
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static const struct uart_driver_api uart_npcx_driver_api = {
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.poll_in = uart_npcx_poll_in,
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.poll_out = uart_npcx_poll_out,
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.err_check = uart_npcx_err_check,
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.fifo_fill = uart_npcx_fifo_fill,
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.fifo_read = uart_npcx_fifo_read,
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.irq_tx_enable = uart_npcx_irq_tx_enable,
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.irq_tx_disable = uart_npcx_irq_tx_disable,
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.irq_tx_ready = uart_npcx_irq_tx_ready,
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.irq_tx_complete = uart_npcx_irq_tx_complete,
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.irq_rx_enable = uart_npcx_irq_rx_enable,
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.irq_rx_disable = uart_npcx_irq_rx_disable,
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.irq_rx_ready = uart_npcx_irq_rx_ready,
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.irq_err_enable = uart_npcx_irq_err_enable,
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.irq_err_disable = uart_npcx_irq_err_disable,
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.irq_is_pending = uart_npcx_irq_is_pending,
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.irq_update = uart_npcx_irq_update,
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.irq_callback_set = uart_npcx_irq_callback_set,
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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static int uart_npcx_init(const struct device *dev)
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{
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const struct uart_npcx_config *const config = DRV_CONFIG(dev);
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const struct uart_npcx_data *const data = DRV_DATA(dev);
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struct uart_reg *const inst = HAL_INSTANCE(dev);
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const struct device *const clk_dev =
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device_get_binding(NPCX_CLK_CTRL_NAME);
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uint32_t uart_rate;
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/* Turn on device clock first */
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if (clock_control_on(clk_dev,
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(clock_control_subsys_t *) &config->clk_cfg) != 0) {
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return -EIO;
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}
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/*
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* If apb2's clock is not 15MHz, we need to find the other optimized
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* values of UPSR and UBAUD for baud rate 115200.
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*/
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if (clock_control_get_rate(clk_dev,
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(clock_control_subsys_t *) &config->clk_cfg, &uart_rate) < 0) {
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LOG_ERR("UART clock rate get error.");
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}
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__ASSERT(uart_rate == 15000000, "Unsupported apb2 clock for UART!");
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/* Fix baud rate to 115200 */
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if (data->baud_rate == 115200) {
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inst->UPSR = 0x38;
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inst->UBAUD = 0x01;
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} else
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return -EINVAL;
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/*
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* 8-N-1, FIFO enabled. Must be done after setting
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* the divisor for the new divisor to take effect.
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*/
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inst->UFRS = 0x00;
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/* Initialize UART FIFO if mode is interrupt driven */
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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/* Enable the UART FIFO mode */
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inst->UMDSL |= BIT(NPCX_UMDSL_FIFO_MD);
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/* Disable all UART tx FIFO interrupts */
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uart_npcx_dis_all_tx_interrupts(dev);
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/* Clear UART rx FIFO */
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uart_npcx_clear_rx_fifo(dev);
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/* Configure UART interrupts */
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config->uconf.irq_config_func(dev);
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#endif
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#if defined(CONFIG_SYS_POWER_DEEP_SLEEP_STATES)
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/*
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* Configure the UART wake-up event triggered from a falling edge
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* on CR_SIN pin. No need for callback function.
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*/
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npcx_miwu_interrupt_configure(&config->uart_rx_wui,
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NPCX_MIWU_MODE_EDGE, NPCX_MIWU_TRIG_LOW);
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/* Enable irq of interrupt-input module */
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npcx_miwu_irq_enable(&config->uart_rx_wui);
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#endif
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/* Configure pin-mux for uart device */
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npcx_pinctrl_mux_configure(config->alts_list, config->alts_size, 1);
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return 0;
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}
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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#define NPCX_UART_IRQ_CONFIG_FUNC_DECL(inst) \
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static void uart_npcx_irq_config_##inst(const struct device *dev)
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#define NPCX_UART_IRQ_CONFIG_FUNC_INIT(inst) \
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.irq_config_func = uart_npcx_irq_config_##inst,
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#define NPCX_UART_IRQ_CONFIG_FUNC(inst) \
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static void uart_npcx_irq_config_##inst(const struct device *dev) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(inst), \
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DT_INST_IRQ(inst, priority), \
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uart_npcx_isr, \
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DEVICE_GET(uart_npcx_##inst), \
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0); \
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irq_enable(DT_INST_IRQN(inst)); \
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}
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#else
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#define NPCX_UART_IRQ_CONFIG_FUNC_DECL(inst)
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#define NPCX_UART_IRQ_CONFIG_FUNC_INIT(inst)
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#define NPCX_UART_IRQ_CONFIG_FUNC(inst)
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#endif
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#define NPCX_UART_INIT(inst) \
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NPCX_UART_IRQ_CONFIG_FUNC_DECL(inst); \
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\
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static const struct npcx_alt uart_alts##inst[] = \
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DT_NPCX_ALT_ITEMS_LIST(inst); \
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\
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static const struct uart_npcx_config uart_npcx_cfg_##inst = { \
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.uconf = { \
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.base = (uint8_t *)DT_INST_REG_ADDR(inst), \
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NPCX_UART_IRQ_CONFIG_FUNC_INIT(inst) \
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}, \
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.clk_cfg = DT_NPCX_CLK_CFG_ITEM(inst), \
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.uart_rx_wui = DT_NPCX_WUI_ITEM_BY_NAME(0, uart_rx), \
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.alts_size = ARRAY_SIZE(uart_alts##inst), \
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.alts_list = uart_alts##inst, \
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}; \
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\
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static struct uart_npcx_data uart_npcx_data_##inst = { \
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.baud_rate = DT_INST_PROP(inst, current_speed) \
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}; \
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\
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DEVICE_AND_API_INIT(uart_npcx_##inst, DT_INST_LABEL(inst), \
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&uart_npcx_init, \
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&uart_npcx_data_##inst, &uart_npcx_cfg_##inst, \
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&uart_npcx_driver_api); \
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\
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NPCX_UART_IRQ_CONFIG_FUNC(inst)
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DT_INST_FOREACH_STATUS_OKAY(NPCX_UART_INIT)
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