Andrew Boie 4c87224818 x86: add qemu_x86_tiny ... This build target has all the low-memory options enabled for memory management: a 4MB address space, 32-bit paging mode, no KPTI, an empty page pool, and common page tables for memory domains. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>		2020-11-05 09:33:40 -05:00
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acrn	boards: x86: tune X86_MMU_PAGE_POOL_PAGES	2020-11-05 09:33:40 -05:00
common/scripts	…
minnowboard	boards: x86: tune X86_MMU_PAGE_POOL_PAGES	2020-11-05 09:33:40 -05:00
qemu_x86	x86: add qemu_x86_tiny	2020-11-05 09:33:40 -05:00
up_squared	boards: x86: tune X86_MMU_PAGE_POOL_PAGES	2020-11-05 09:33:40 -05:00
index.rst	…