c5b59282d6
The Cache is an optional configuration of both the ARM Cortex-M7 and Cortex-M55. Previously, it was just checking that it was just an M7 rather than knowing that the CPU actually was built with the cache. Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com> |
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| .. | ||
| beetle | ||
| designstart | ||
| fvp_aemv8r_aarch32 | ||
| mps2 | ||
| mps3 | ||
| musca_b1 | ||
| musca_s1 | ||
| CMakeLists.txt | ||
| Kconfig | ||
| Kconfig.defconfig | ||
| Kconfig.soc | ||