58 lines
1.6 KiB
C
58 lines
1.6 KiB
C
/*
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* Copyright (c) 2020 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _SOC__H_
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#define _SOC__H_
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#include <sys/util.h>
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#include <eoss3_dev.h>
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#include <devicetree.h>
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/* Available frequencies */
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#define HSOSC_1MHZ 1024000
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#define HSOSC_2MHZ (2*HSOSC_1MHZ)
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#define HSOSC_3MHZ (3*HSOSC_1MHZ)
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#define HSOSC_4MHZ (4*HSOSC_1MHZ)
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#define HSOSC_5MHZ (5*HSOSC_1MHZ)
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#define HSOSC_6MHZ (6*HSOSC_1MHZ)
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#define HSOSC_8MHZ (8*HSOSC_1MHZ)
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#define HSOSC_9MHZ (9*HSOSC_1MHZ)
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#define HSOSC_10MHZ (10*HSOSC_1MHZ)
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#define HSOSC_12MHZ (12*HSOSC_1MHZ)
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#define HSOSC_15MHZ (15*HSOSC_1MHZ)
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#define HSOSC_16MHZ (16*HSOSC_1MHZ)
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#define HSOSC_18MHZ (18*HSOSC_1MHZ)
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#define HSOSC_20MHZ (20*HSOSC_1MHZ)
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#define HSOSC_21MHZ (21*HSOSC_1MHZ)
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#define HSOSC_24MHZ (24*HSOSC_1MHZ)
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#define HSOSC_27MHZ (27*HSOSC_1MHZ)
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#define HSOSC_30MHZ (30*HSOSC_1MHZ)
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#define HSOSC_32MHZ (32*HSOSC_1MHZ)
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#define HSOSC_35MHZ (35*HSOSC_1MHZ)
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#define HSOSC_36MHZ (36*HSOSC_1MHZ)
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#define HSOSC_40MHZ (40*HSOSC_1MHZ)
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#define HSOSC_45MHZ (45*HSOSC_1MHZ)
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#define HSOSC_48MHZ (48*HSOSC_1MHZ)
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#define HSOSC_54MHZ (54*HSOSC_1MHZ)
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#define HSOSC_60MHZ (60*HSOSC_1MHZ)
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#define HSOSC_64MHZ (64*HSOSC_1MHZ)
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#define HSOSC_70MHZ (70*HSOSC_1MHZ)
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#define HSOSC_72MHZ (72*HSOSC_1MHZ)
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#define HSOSC_80MHZ (80*HSOSC_1MHZ)
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#define OSC_CLK_LOCKED() (AIP->OSC_STA_0 & 0x1)
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#define OSC_SET_FREQ_INC(FREQ) (AIP->OSC_CTRL_1 = ((FREQ / 32768) - 3) & 0xFFF)
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#define OSC_GET_FREQ_INC() (((AIP->OSC_CTRL_1 & 0xFFF) + 3) * 32768)
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#define EOS_S3_MAX_PAD_NR 45
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void eos_s3_lock_enable(void);
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void eos_s3_lock_disable(void);
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int eos_s3_io_mux(uint32_t pad_nr, uint32_t pad_cfg);
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#endif /* _SOC__H_ */
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