40 lines
495 B
Plaintext
40 lines
495 B
Plaintext
if SOC_SERIES_RISCV32_QEMU
|
|
|
|
config SOC_SERIES
|
|
string
|
|
default "riscv32-qemu"
|
|
|
|
config SYS_CLOCK_HW_CYCLES_PER_SEC
|
|
int
|
|
default 10000000
|
|
|
|
config RISCV_SOC_INTERRUPT_INIT
|
|
bool
|
|
default y
|
|
|
|
config INCLUDE_RESET_VECTOR
|
|
bool
|
|
default y
|
|
|
|
config NUM_IRQS
|
|
int
|
|
default 32
|
|
|
|
config RISCV_ROM_BASE_ADDR
|
|
hex
|
|
default 0x00001000
|
|
|
|
config RISCV_ROM_SIZE
|
|
hex
|
|
default 0x100000
|
|
|
|
config RISCV_RAM_BASE_ADDR
|
|
hex
|
|
default 0x80000000
|
|
|
|
config RISCV_RAM_SIZE_MB
|
|
int
|
|
default 32
|
|
|
|
endif # SOC_SERIES_RISCV32_QEMU
|