578 lines
16 KiB
C
578 lines
16 KiB
C
/*
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT ovti_ov7670
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/i2c.h>
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#include <zephyr/drivers/video.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(video_ov7670, CONFIG_VIDEO_LOG_LEVEL);
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/* Initialization register structure */
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struct ov7670_reg {
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uint8_t reg;
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uint8_t cmd;
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};
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struct ov7670_config {
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struct i2c_dt_spec bus;
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#if DT_ANY_INST_HAS_PROP_STATUS_OKAY(reset_gpios)
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struct gpio_dt_spec reset;
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#endif
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#if DT_ANY_INST_HAS_PROP_STATUS_OKAY(pwdn_gpios)
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struct gpio_dt_spec pwdn;
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#endif
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};
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struct ov7670_data {
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struct video_format fmt;
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};
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struct ov7670_resolution_cfg {
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uint8_t com7;
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uint8_t com3;
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uint8_t com14;
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uint8_t scaling_xsc;
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uint8_t scaling_ysc;
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uint8_t dcwctr;
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uint8_t pclk_div;
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uint8_t pclk_delay;
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};
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/* Resolution settings for camera, based on those present in MCUX SDK */
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const struct ov7670_resolution_cfg OV7670_RESOLUTION_QCIF = {
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.com7 = 0x2c,
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.com3 = 0x00,
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.com14 = 0x11,
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.scaling_xsc = 0x3a,
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.scaling_ysc = 0x35,
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.dcwctr = 0x11,
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.pclk_div = 0xf1,
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.pclk_delay = 0x52
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};
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const struct ov7670_resolution_cfg OV7670_RESOLUTION_QVGA = {
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.com7 = 0x14,
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.com3 = 0x04,
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.com14 = 0x19,
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.scaling_xsc = 0x3a,
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.scaling_ysc = 0x35,
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.dcwctr = 0x11,
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.pclk_div = 0xf1,
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.pclk_delay = 0x02
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};
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const struct ov7670_resolution_cfg OV7670_RESOLUTION_CIF = {
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.com7 = 0x24,
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.com3 = 0x08,
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.com14 = 0x11,
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.scaling_xsc = 0x3a,
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.scaling_ysc = 0x35,
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.dcwctr = 0x11,
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.pclk_div = 0xf1,
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.pclk_delay = 0x02
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};
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const struct ov7670_resolution_cfg OV7670_RESOLUTION_VGA = {
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.com7 = 0x04,
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.com3 = 0x00,
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.com14 = 0x00,
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.scaling_xsc = 0x3a,
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.scaling_ysc = 0x35,
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.dcwctr = 0x11,
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.pclk_div = 0xf0,
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.pclk_delay = 0x02
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};
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/* OV7670 registers */
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#define OV7670_PID 0x0A
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#define OV7670_COM7 0x12
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#define OV7670_MVFP 0x1E
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#define OV7670_COM10 0x15
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#define OV7670_COM12 0x3C
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#define OV7670_BRIGHT 0x55
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#define OV7670_CLKRC 0x11
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#define OV7670_SCALING_PCLK_DIV 0x73
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#define OV7670_COM14 0x3E
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#define OV7670_DBLV 0x6B
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#define OV7670_SCALING_XSC 0x70
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#define OV7670_SCALING_YSC 0x71
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#define OV7670_COM2 0x09
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#define OV7670_SCALING_PCLK_DELAY 0xA2
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#define OV7670_BD50MAX 0xA5
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#define OV7670_BD60MAX 0xAB
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#define OV7670_HAECC7 0xAA
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#define OV7670_COM3 0x0C
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#define OV7670_COM4 0x0D
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#define OV7670_COM6 0x0F
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#define OV7670_COM11 0x3B
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#define OV7670_EDGE 0x3F
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#define OV7670_DNSTH 0x4C
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#define OV7670_DM_LNL 0x92
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#define OV7670_DM_LNH 0x93
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#define OV7670_COM15 0x40
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#define OV7670_TSLB 0x3A
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#define OV7670_COM13 0x3D
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#define OV7670_MANU 0x67
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#define OV7670_MANV 0x68
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#define OV7670_HSTART 0x17
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#define OV7670_HSTOP 0x18
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#define OV7670_VSTRT 0x19
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#define OV7670_VSTOP 0x1A
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#define OV7670_HREF 0x32
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#define OV7670_VREF 0x03
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#define OV7670_SCALING_DCWCTR 0x72
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#define OV7670_GAIN 0x00
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#define OV7670_AECHH 0x07
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#define OV7670_AECH 0x10
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#define OV7670_COM8 0x13
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#define OV7670_COM9 0x14
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#define OV7670_AEW 0x24
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#define OV7670_AEB 0x25
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#define OV7670_VPT 0x26
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#define OV7670_AWBC1 0x43
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#define OV7670_AWBC2 0x44
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#define OV7670_AWBC3 0x45
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#define OV7670_AWBC4 0x46
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#define OV7670_AWBC5 0x47
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#define OV7670_AWBC6 0x48
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#define OV7670_MTX1 0x4F
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#define OV7670_MTX2 0x50
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#define OV7670_MTX3 0x51
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#define OV7670_MTX4 0x52
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#define OV7670_MTX5 0x53
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#define OV7670_MTX6 0x54
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#define OV7670_LCC1 0x62
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#define OV7670_LCC2 0x63
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#define OV7670_LCC3 0x64
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#define OV7670_LCC4 0x65
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#define OV7670_LCC5 0x66
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#define OV7670_LCC6 0x94
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#define OV7670_LCC7 0x95
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#define OV7670_SLOP 0x7A
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#define OV7670_GAM1 0x7B
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#define OV7670_GAM2 0x7C
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#define OV7670_GAM3 0x7D
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#define OV7670_GAM4 0x7E
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#define OV7670_GAM5 0x7F
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#define OV7670_GAM6 0x80
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#define OV7670_GAM7 0x81
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#define OV7670_GAM8 0x82
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#define OV7670_GAM9 0x83
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#define OV7670_GAM10 0x84
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#define OV7670_GAM11 0x85
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#define OV7670_GAM12 0x86
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#define OV7670_GAM13 0x87
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#define OV7670_GAM14 0x88
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#define OV7670_GAM15 0x89
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#define OV7670_HAECC1 0x9F
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#define OV7670_HAECC2 0xA0
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#define OV7670_HSYEN 0x31
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#define OV7670_HAECC3 0xA6
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#define OV7670_HAECC4 0xA7
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#define OV7670_HAECC5 0xA8
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#define OV7670_HAECC6 0xA9
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/* OV7670 definitions */
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#define OV7670_PROD_ID 0x76
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#define OV7670_VIDEO_FORMAT_CAP(width, height, format) \
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{ \
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.pixelformat = (format), .width_min = (width), .width_max = (width), \
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.height_min = (height), .height_max = (height), .width_step = 0, .height_step = 0 \
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}
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static const struct video_format_cap fmts[] = {
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OV7670_VIDEO_FORMAT_CAP(176, 144, VIDEO_PIX_FMT_RGB565), /* QCIF */
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OV7670_VIDEO_FORMAT_CAP(320, 240, VIDEO_PIX_FMT_RGB565), /* QVGA */
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OV7670_VIDEO_FORMAT_CAP(352, 288, VIDEO_PIX_FMT_RGB565), /* CIF */
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OV7670_VIDEO_FORMAT_CAP(640, 480, VIDEO_PIX_FMT_RGB565), /* VGA */
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OV7670_VIDEO_FORMAT_CAP(176, 144, VIDEO_PIX_FMT_YUYV), /* QCIF */
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OV7670_VIDEO_FORMAT_CAP(320, 240, VIDEO_PIX_FMT_YUYV), /* QVGA */
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OV7670_VIDEO_FORMAT_CAP(352, 288, VIDEO_PIX_FMT_YUYV), /* CIF */
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OV7670_VIDEO_FORMAT_CAP(640, 480, VIDEO_PIX_FMT_YUYV), /* VGA */
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{0}};
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/*
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* This initialization table is based on the MCUX SDK driver for the OV7670.
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* Note that this table assumes the camera is fed a 6MHz XCLK signal
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*/
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static const struct ov7670_reg ov7670_init_regtbl[] = {
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{OV7670_MVFP, 0x20}, /* MVFP: Mirror/VFlip,Normal image */
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/* configure the output timing */
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/* PCLK does not toggle during horizontal blank, one PCLK, one pixel */
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{OV7670_COM10, 0x20}, /* COM10 */
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{OV7670_COM12, 0x00}, /* COM12,No HREF when VSYNC is low */
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/* Brightness Control, with signal -128 to +128, 0x00 is middle value */
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{OV7670_BRIGHT, 0x2f},
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/* Internal clock pre-scalar,F(internal clock) = F(input clock)/(Bit[5:0]+1) */
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{OV7670_CLKRC, 0x80}, /* Clock Div, Input/(n+1), bit6 set to 1 to disable divider */
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/* DBLV,Bit[7:6]: PLL control */
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/* 0:Bypass PLL, 40: Input clock x4 , 80: Input clock x6 ,C0: Input clock x8 */
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{OV7670_DBLV, 0x00},
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/* Output Drive Capability */
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{OV7670_COM2, 0x00}, /* Common Control 2, Output Drive Capability: 1x */
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{OV7670_BD50MAX, 0x05},
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{OV7670_BD60MAX, 0x07},
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{OV7670_HAECC7, 0x94},
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{OV7670_COM4, 0x00},
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{OV7670_COM6, 0x4b},
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{OV7670_COM11, 0x9F}, /* Night mode */
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{OV7670_EDGE, 0x04}, /* Edge Enhancement Adjustment */
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{OV7670_DNSTH, 0x00}, /* De-noise Strength */
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{OV7670_DM_LNL, 0x00},
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{OV7670_DM_LNH, 0x00},
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/* reserved */
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{0x16, 0x02},
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{0x21, 0x02},
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{0x22, 0x91},
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{0x29, 0x07},
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{0x35, 0x0b},
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{0x33, 0x0b},
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{0x37, 0x1d},
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{0x38, 0x71},
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{0x39, 0x2a},
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{0x0e, 0x61},
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{0x56, 0x40},
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{0x57, 0x80},
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{0x69, 0x00},
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{0x74, 0x19},
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/* display , need retain */
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{OV7670_COM15, 0xD0}, /* Common Control 15 */
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{OV7670_TSLB, 0x0C}, /* Line Buffer Test Option */
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{OV7670_COM13, 0x80}, /* Common Control 13 */
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{OV7670_MANU, 0x11}, /* Manual U Value */
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{OV7670_MANV, 0xFF}, /* Manual V Value */
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/* config the output window data, this can be configed later */
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{OV7670_HSTART, 0x16}, /* HSTART */
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{OV7670_HSTOP, 0x04}, /* HSTOP */
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{OV7670_VSTRT, 0x02}, /* VSTRT */
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{OV7670_VSTOP, 0x7a}, /* VSTOP */
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{OV7670_HREF, 0x80}, /* HREF */
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{OV7670_VREF, 0x0a}, /* VREF */
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/* AGC/AEC - Automatic Gain Control/Automatic exposure Control */
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{OV7670_GAIN, 0x00}, /* AGC */
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{OV7670_AECHH, 0x3F}, /* Exposure Value */
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{OV7670_AECH, 0xFF},
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{OV7670_COM8, 0x66},
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{OV7670_COM9, 0x21}, /* limit the max gain */
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{OV7670_AEW, 0x75},
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{OV7670_AEB, 0x63},
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{OV7670_VPT, 0xA5},
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/* Automatic white balance control */
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{OV7670_AWBC1, 0x14},
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{OV7670_AWBC2, 0xf0},
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{OV7670_AWBC3, 0x34},
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{OV7670_AWBC4, 0x58},
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{OV7670_AWBC5, 0x28},
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{OV7670_AWBC6, 0x3a},
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/* Matrix Coefficient */
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{OV7670_MTX1, 0x80},
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{OV7670_MTX2, 0x80},
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{OV7670_MTX3, 0x00},
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{OV7670_MTX4, 0x22},
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{OV7670_MTX5, 0x5e},
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{OV7670_MTX6, 0x80},
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/* AWB Control */
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{0x59, 0x88},
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{0x5a, 0x88},
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{0x5b, 0x44},
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{0x5c, 0x67},
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{0x5d, 0x49},
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{0x5e, 0x0e},
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{0x6c, 0x0a},
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{0x6d, 0x55},
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{0x6e, 0x11},
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{0x6f, 0x9f},
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/* Lens Correction Option */
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{OV7670_LCC1, 0x00},
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{OV7670_LCC2, 0x00},
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{OV7670_LCC3, 0x04},
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{OV7670_LCC4, 0x20},
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{OV7670_LCC5, 0x05},
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{OV7670_LCC6, 0x04}, /* effective only when LCC5[2] is high */
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{OV7670_LCC7, 0x08}, /* effective only when LCC5[2] is high */
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/* Gamma Curve, needn't config */
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{OV7670_SLOP, 0x20},
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{OV7670_GAM1, 0x1c},
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{OV7670_GAM2, 0x28},
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{OV7670_GAM3, 0x3c},
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{OV7670_GAM4, 0x55},
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{OV7670_GAM5, 0x68},
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{OV7670_GAM6, 0x76},
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{OV7670_GAM7, 0x80},
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{OV7670_GAM8, 0x88},
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{OV7670_GAM9, 0x8f},
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{OV7670_GAM10, 0x96},
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{OV7670_GAM11, 0xa3},
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{OV7670_GAM12, 0xaf},
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{OV7670_GAM13, 0xc4},
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{OV7670_GAM14, 0xd7},
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{OV7670_GAM15, 0xe8},
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/* Histogram-based AEC/AGC Control */
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{OV7670_HAECC1, 0x78},
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{OV7670_HAECC2, 0x68},
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{OV7670_HSYEN, 0xff},
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{0xa1, 0x03},
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{OV7670_HAECC3, 0xdf},
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{OV7670_HAECC4, 0xdf},
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{OV7670_HAECC5, 0xf0},
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{OV7670_HAECC6, 0x90},
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/* Automatic black Level Compensation */
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{0xb0, 0x84},
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{0xb1, 0x0c},
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{0xb2, 0x0e},
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{0xb3, 0x82},
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{0xb8, 0x0a},
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};
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static int ov7670_get_caps(const struct device *dev, enum video_endpoint_id ep,
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struct video_caps *caps)
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{
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caps->format_caps = fmts;
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return 0;
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}
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static int ov7670_set_fmt(const struct device *dev, enum video_endpoint_id ep,
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struct video_format *fmt)
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{
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const struct ov7670_config *config = dev->config;
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struct ov7670_data *data = dev->data;
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const struct ov7670_resolution_cfg *resolution;
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int ret;
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uint8_t i = 0U;
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if (fmt->pixelformat != VIDEO_PIX_FMT_RGB565 && fmt->pixelformat != VIDEO_PIX_FMT_YUYV) {
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LOG_ERR("Only RGB565 and YUYV supported!");
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return -ENOTSUP;
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}
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if (!memcmp(&data->fmt, fmt, sizeof(data->fmt))) {
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/* nothing to do */
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return 0;
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}
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memcpy(&data->fmt, fmt, sizeof(data->fmt));
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/* Set output resolution */
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while (fmts[i].pixelformat) {
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if (fmts[i].width_min == fmt->width && fmts[i].height_min == fmt->height &&
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fmts[i].pixelformat == fmt->pixelformat) {
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/* Set output format */
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switch (fmts[i].width_min) {
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case 176: /* QCIF */
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resolution = &OV7670_RESOLUTION_QCIF;
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break;
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case 320: /* QVGA */
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resolution = &OV7670_RESOLUTION_QVGA;
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break;
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case 352: /* CIF */
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resolution = &OV7670_RESOLUTION_CIF;
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break;
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default: /* VGA */
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resolution = &OV7670_RESOLUTION_VGA;
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break;
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}
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/* Program resolution bytes settings */
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ret = i2c_reg_write_byte_dt(&config->bus, OV7670_COM7,
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resolution->com7);
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if (ret < 0) {
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return ret;
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}
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ret = i2c_reg_write_byte_dt(&config->bus, OV7670_COM3,
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resolution->com3);
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if (ret < 0) {
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return ret;
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}
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ret = i2c_reg_write_byte_dt(&config->bus, OV7670_COM14,
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resolution->com14);
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if (ret < 0) {
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return ret;
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}
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ret = i2c_reg_write_byte_dt(&config->bus, OV7670_SCALING_XSC,
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resolution->scaling_xsc);
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if (ret < 0) {
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return ret;
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}
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ret = i2c_reg_write_byte_dt(&config->bus, OV7670_SCALING_YSC,
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resolution->scaling_ysc);
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if (ret < 0) {
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return ret;
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}
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ret = i2c_reg_write_byte_dt(&config->bus, OV7670_SCALING_DCWCTR,
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resolution->dcwctr);
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if (ret < 0) {
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return ret;
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}
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ret = i2c_reg_write_byte_dt(&config->bus, OV7670_SCALING_PCLK_DIV,
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resolution->pclk_div);
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if (ret < 0) {
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return ret;
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}
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return i2c_reg_write_byte_dt(&config->bus, OV7670_SCALING_PCLK_DELAY,
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resolution->pclk_delay);
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}
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i++;
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}
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LOG_ERR("Unsupported format");
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return -ENOTSUP;
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}
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static int ov7670_get_fmt(const struct device *dev, enum video_endpoint_id ep,
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struct video_format *fmt)
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{
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struct ov7670_data *data = dev->data;
|
|
|
|
if (fmt == NULL) {
|
|
return -EINVAL;
|
|
}
|
|
memcpy(fmt, &data->fmt, sizeof(data->fmt));
|
|
return 0;
|
|
}
|
|
|
|
static int ov7670_init(const struct device *dev)
|
|
{
|
|
const struct ov7670_config *config = dev->config;
|
|
int ret, i;
|
|
uint8_t pid;
|
|
struct video_format fmt;
|
|
const struct ov7670_reg *reg;
|
|
|
|
if (!i2c_is_ready_dt(&config->bus)) {
|
|
/* I2C device is not ready, return */
|
|
return -ENODEV;
|
|
}
|
|
|
|
#if DT_ANY_INST_HAS_PROP_STATUS_OKAY(pwdn_gpios)
|
|
/* Power up camera module */
|
|
if (config->pwdn.port != NULL) {
|
|
if (!gpio_is_ready_dt(&config->pwdn)) {
|
|
return -ENODEV;
|
|
}
|
|
ret = gpio_pin_configure_dt(&config->pwdn, GPIO_OUTPUT_INACTIVE);
|
|
if (ret < 0) {
|
|
LOG_ERR("Could not clear power down pin: %d", ret);
|
|
return ret;
|
|
}
|
|
}
|
|
#endif
|
|
#if DT_ANY_INST_HAS_PROP_STATUS_OKAY(reset_gpios)
|
|
/* Reset camera module */
|
|
if (config->reset.port != NULL) {
|
|
if (!gpio_is_ready_dt(&config->reset)) {
|
|
return -ENODEV;
|
|
}
|
|
ret = gpio_pin_configure_dt(&config->reset, GPIO_OUTPUT);
|
|
if (ret < 0) {
|
|
LOG_ERR("Could not set reset pin: %d", ret);
|
|
return ret;
|
|
}
|
|
/* Reset is active low, has 1ms settling time*/
|
|
gpio_pin_set_dt(&config->reset, 0);
|
|
k_msleep(1);
|
|
gpio_pin_set_dt(&config->reset, 1);
|
|
k_msleep(1);
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Read product ID from camera. This camera implements the SCCB,
|
|
* spec- which *should* be I2C compatible, but in practice does
|
|
* not seem to respond when I2C repeated start commands are used.
|
|
* To work around this, use a write then a read to interface with
|
|
* registers.
|
|
*/
|
|
uint8_t cmd = OV7670_PID;
|
|
|
|
ret = i2c_write_dt(&config->bus, &cmd, sizeof(cmd));
|
|
if (ret < 0) {
|
|
LOG_ERR("Could not request product ID: %d", ret);
|
|
return ret;
|
|
}
|
|
ret = i2c_read_dt(&config->bus, &pid, sizeof(pid));
|
|
if (ret < 0) {
|
|
LOG_ERR("Could not read product ID: %d", ret);
|
|
return ret;
|
|
}
|
|
|
|
if (pid != OV7670_PROD_ID) {
|
|
LOG_ERR("Incorrect product ID: 0x%02X", pid);
|
|
return -ENODEV;
|
|
}
|
|
|
|
/* Reset camera registers */
|
|
ret = i2c_reg_write_byte_dt(&config->bus, OV7670_COM7, 0x80);
|
|
if (ret < 0) {
|
|
LOG_ERR("Could not reset camera: %d", ret);
|
|
return ret;
|
|
}
|
|
/* Delay after reset */
|
|
k_msleep(5);
|
|
|
|
/* Set default camera format (QVGA, YUYV) */
|
|
fmt.pixelformat = VIDEO_PIX_FMT_YUYV;
|
|
fmt.width = 640;
|
|
fmt.height = 480;
|
|
fmt.pitch = fmt.width * 2;
|
|
ret = ov7670_set_fmt(dev, VIDEO_EP_OUT, &fmt);
|
|
if (ret < 0) {
|
|
return ret;
|
|
}
|
|
|
|
/* Write initialization values to OV7670 */
|
|
for (i = 0; i < ARRAY_SIZE(ov7670_init_regtbl); i++) {
|
|
reg = &ov7670_init_regtbl[i];
|
|
ret = i2c_reg_write_byte_dt(&config->bus, reg->reg, reg->cmd);
|
|
if (ret < 0) {
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct video_driver_api ov7670_api = {
|
|
.set_format = ov7670_set_fmt,
|
|
.get_format = ov7670_get_fmt,
|
|
.get_caps = ov7670_get_caps,
|
|
};
|
|
|
|
#if DT_ANY_INST_HAS_PROP_STATUS_OKAY(reset_gpios)
|
|
#define OV7670_RESET_GPIO(inst) .reset = GPIO_DT_SPEC_INST_GET_OR(inst, reset_gpios, {}),
|
|
#else
|
|
#define OV7670_RESET_GPIO(inst)
|
|
#endif
|
|
|
|
#if DT_ANY_INST_HAS_PROP_STATUS_OKAY(pwdn_gpios)
|
|
#define OV7670_PWDN_GPIO(inst) .pwdn = GPIO_DT_SPEC_INST_GET_OR(inst, pwdn_gpios, {}),
|
|
#else
|
|
#define OV7670_PWDN_GPIO(inst)
|
|
#endif
|
|
|
|
#define OV7670_INIT(inst) \
|
|
const struct ov7670_config ov7670_config_##inst = {.bus = I2C_DT_SPEC_INST_GET(inst), \
|
|
OV7670_RESET_GPIO(inst) \
|
|
OV7670_PWDN_GPIO(inst)}; \
|
|
struct ov7670_data ov7670_data_##inst; \
|
|
\
|
|
DEVICE_DT_INST_DEFINE(inst, ov7670_init, NULL, &ov7670_data_##inst, &ov7670_config_##inst, \
|
|
POST_KERNEL, CONFIG_VIDEO_INIT_PRIORITY, &ov7670_api);
|
|
|
|
DT_INST_FOREACH_STATUS_OKAY(OV7670_INIT)
|