398 lines
11 KiB
C
398 lines
11 KiB
C
/*
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* Copyright 2023, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT sitronix_st7796s
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#include <zephyr/device.h>
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#include <zephyr/drivers/display.h>
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#include <zephyr/sys/byteorder.h>
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#include <zephyr/drivers/mipi_dbi.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(display_st7796s, CONFIG_DISPLAY_LOG_LEVEL);
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#include "display_st7796s.h"
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/* Magic numbers used to lock/unlock command settings */
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#define ST7796S_UNLOCK_1 0xC3
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#define ST7796S_UNLOCK_2 0x96
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#define ST7796S_LOCK_1 0x3C
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#define ST7796S_LOCK_2 0x69
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#define ST7796S_PIXEL_SIZE 2 /* Only 16 bit color mode supported with this driver */
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struct st7796s_config {
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const struct device *mipi_dbi;
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const struct mipi_dbi_config dbi_config;
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uint16_t width;
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uint16_t height;
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bool inverted; /* Display color inversion */
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/* Display configuration parameters */
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uint8_t dic; /* Display inversion control */
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uint8_t frmctl1[2]; /* Frame rate control, normal mode */
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uint8_t frmctl2[2]; /* Frame rate control, idle mode */
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uint8_t frmctl3[2]; /* Frame rate control, partial mode */
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uint8_t bpc[4]; /* Blanking porch control */
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uint8_t dfc[4]; /* Display function control */
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uint8_t pwr1[2]; /* Power control 1 */
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uint8_t pwr2; /* Power control 2 */
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uint8_t pwr3; /* Power control 3 */
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uint8_t vcmpctl; /* VCOM control */
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uint8_t doca[8]; /* Display output ctrl */
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uint8_t pgc[14]; /* Positive gamma control */
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uint8_t ngc[14]; /* Negative gamma control */
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uint8_t madctl; /* Memory data access control */
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bool rgb_is_inverted;
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};
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static int st7796s_send_cmd(const struct device *dev,
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uint8_t cmd, const uint8_t *data, size_t len)
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{
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const struct st7796s_config *config = dev->config;
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return mipi_dbi_command_write(config->mipi_dbi, &config->dbi_config,
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cmd, data, len);
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}
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static int st7796s_set_cursor(const struct device *dev,
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const uint16_t x, const uint16_t y,
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const uint16_t width, const uint16_t height)
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{
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uint16_t addr_data[2];
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int ret;
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/* Column address */
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addr_data[0] = sys_cpu_to_be16(x);
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addr_data[1] = sys_cpu_to_be16(x + width - 1);
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ret = st7796s_send_cmd(dev, ST7796S_CMD_CASET,
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(uint8_t *)addr_data, sizeof(addr_data));
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if (ret < 0) {
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return ret;
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}
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/* Row address */
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addr_data[0] = sys_cpu_to_be16(y);
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addr_data[1] = sys_cpu_to_be16(y + height - 1);
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ret = st7796s_send_cmd(dev, ST7796S_CMD_RASET,
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(uint8_t *)addr_data, sizeof(addr_data));
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return ret;
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}
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static int st7796s_blanking_on(const struct device *dev)
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{
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return st7796s_send_cmd(dev, ST7796S_CMD_DISPOFF, NULL, 0);
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}
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static int st7796s_blanking_off(const struct device *dev)
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{
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return st7796s_send_cmd(dev, ST7796S_CMD_DISPON, NULL, 0);
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}
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static int st7796s_get_pixelfmt(const struct device *dev)
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{
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const struct st7796s_config *config = dev->config;
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/*
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* Invert the pixel format for 8-bit 8080 Parallel Interface.
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*
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* Zephyr uses big endian byte order when the pixel format has
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* multiple bytes.
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*
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* For RGB565, Red is placed in byte 1 and Blue in byte 0.
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* For BGR565, Red is placed in byte 0 and Blue in byte 1.
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*
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* This is not an issue when using a 16-bit interface.
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* For RGB565, this would map to Red being in D[11:15] and
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* Blue in D[0:4] and vice versa for BGR565.
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*
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* However this is an issue when using a 8-bit interface.
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* For RGB565, Blue is placed in byte 0 as mentioned earlier.
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* However the controller expects Red to be in D[3:7] of byte 0.
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*
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* Hence we report pixel format as RGB when MADCTL setting is BGR
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* and vice versa.
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*/
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if (config->dbi_config.mode == MIPI_DBI_MODE_8080_BUS_8_BIT) {
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/*
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* Similar to the handling for other interface modes,
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* invert the reported pixel format if "rgb_is_inverted"
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* is enabled
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*/
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if (((bool)(config->madctl & ST7796S_MADCTL_BGR)) !=
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config->rgb_is_inverted) {
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return PIXEL_FORMAT_RGB_565;
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} else {
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return PIXEL_FORMAT_BGR_565;
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}
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}
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/*
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* Invert the pixel format if rgb_is_inverted is enabled.
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* Report pixel format as the same format set in the MADCTL
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* if rgb_is_inverted is disabled.
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* Report pixel format as RGB if MADCTL setting is BGR and vice versa
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* if rgb_is_inverted is enabled.
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* It is a workaround for supporting buggy modules that display RGB as BGR.
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*/
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if (((bool)(config->madctl & ST7796S_MADCTL_BGR)) !=
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config->rgb_is_inverted) {
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return PIXEL_FORMAT_BGR_565;
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} else {
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return PIXEL_FORMAT_RGB_565;
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}
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}
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static int st7796s_write(const struct device *dev,
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const uint16_t x,
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const uint16_t y,
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const struct display_buffer_descriptor *desc,
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const void *buf)
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{
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const struct st7796s_config *config = dev->config;
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int ret;
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struct display_buffer_descriptor mipi_desc;
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enum display_pixel_format pixfmt;
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ret = st7796s_set_cursor(dev, x, y, desc->width, desc->height);
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if (ret < 0) {
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return ret;
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}
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mipi_desc.buf_size = desc->width * desc->height * ST7796S_PIXEL_SIZE;
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ret = mipi_dbi_command_write(config->mipi_dbi,
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&config->dbi_config, ST7796S_CMD_RAMWR,
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NULL, 0);
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if (ret < 0) {
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return ret;
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}
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pixfmt = st7796s_get_pixelfmt(dev);
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return mipi_dbi_write_display(config->mipi_dbi,
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&config->dbi_config, buf,
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&mipi_desc, pixfmt);
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}
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static void st7796s_get_capabilities(const struct device *dev,
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struct display_capabilities *capabilities)
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{
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const struct st7796s_config *config = dev->config;
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memset(capabilities, 0, sizeof(struct display_capabilities));
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capabilities->current_pixel_format = st7796s_get_pixelfmt(dev);
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capabilities->x_resolution = config->width;
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capabilities->y_resolution = config->height;
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capabilities->current_orientation = DISPLAY_ORIENTATION_NORMAL;
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}
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static int st7796s_lcd_config(const struct device *dev)
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{
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const struct st7796s_config *config = dev->config;
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int ret;
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uint8_t param;
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/* Unlock display configuration */
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param = ST7796S_UNLOCK_1;
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ret = st7796s_send_cmd(dev, ST7796S_CMD_CSCON, ¶m, sizeof(param));
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if (ret < 0) {
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return ret;
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}
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param = ST7796S_UNLOCK_2;
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ret = st7796s_send_cmd(dev, ST7796S_CMD_CSCON, ¶m, sizeof(param));
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if (ret < 0) {
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return ret;
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}
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ret = st7796s_send_cmd(dev, ST7796S_CMD_DIC, &config->dic, sizeof(config->dic));
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if (ret < 0) {
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return ret;
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}
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ret = st7796s_send_cmd(dev, ST7796S_CMD_FRMCTR1, config->frmctl1,
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sizeof(config->frmctl1));
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if (ret < 0) {
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return ret;
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}
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ret = st7796s_send_cmd(dev, ST7796S_CMD_FRMCTR2, config->frmctl2,
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sizeof(config->frmctl2));
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if (ret < 0) {
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return ret;
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}
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ret = st7796s_send_cmd(dev, ST7796S_CMD_FRMCTR3, config->frmctl3,
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sizeof(config->frmctl3));
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if (ret < 0) {
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return ret;
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}
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ret = st7796s_send_cmd(dev, ST7796S_CMD_BPC, config->bpc, sizeof(config->bpc));
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if (ret < 0) {
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return ret;
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}
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ret = st7796s_send_cmd(dev, ST7796S_CMD_DFC, config->dfc, sizeof(config->dfc));
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if (ret < 0) {
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return ret;
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}
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ret = st7796s_send_cmd(dev, ST7796S_CMD_PWR1, config->pwr1, sizeof(config->pwr1));
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if (ret < 0) {
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return ret;
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}
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ret = st7796s_send_cmd(dev, ST7796S_CMD_PWR2, &config->pwr2, sizeof(config->pwr2));
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if (ret < 0) {
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return ret;
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}
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ret = st7796s_send_cmd(dev, ST7796S_CMD_PWR3, &config->pwr3, sizeof(config->pwr3));
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if (ret < 0) {
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return ret;
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}
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ret = st7796s_send_cmd(dev, ST7796S_CMD_VCMPCTL, &config->vcmpctl,
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sizeof(config->vcmpctl));
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if (ret < 0) {
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return ret;
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}
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ret = st7796s_send_cmd(dev, ST7796S_CMD_DOCA, config->doca,
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sizeof(config->doca));
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if (ret < 0) {
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return ret;
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}
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ret = st7796s_send_cmd(dev, ST7796S_CMD_PGC, config->pgc, sizeof(config->pgc));
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if (ret < 0) {
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return ret;
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}
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ret = st7796s_send_cmd(dev, ST7796S_CMD_NGC, config->ngc, sizeof(config->ngc));
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if (ret < 0) {
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return ret;
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}
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/* Lock display configuration */
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param = ST7796S_LOCK_1;
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ret = st7796s_send_cmd(dev, ST7796S_CMD_CSCON, ¶m, sizeof(param));
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if (ret < 0) {
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return ret;
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}
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param = ST7796S_LOCK_2;
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return st7796s_send_cmd(dev, ST7796S_CMD_CSCON, ¶m, sizeof(param));
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}
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static int st7796s_init(const struct device *dev)
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{
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const struct st7796s_config *config = dev->config;
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int ret;
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uint8_t param;
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/* Since VDDI comes up before reset pin is low, we must reset display
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* state. Pulse for 100 MS, per datasheet
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*/
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ret = mipi_dbi_reset(config->mipi_dbi, 100);
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if (ret < 0) {
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return ret;
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}
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/* Delay an additional 100ms after reset */
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k_msleep(100);
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/* Configure controller parameters */
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ret = st7796s_lcd_config(dev);
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if (ret < 0) {
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LOG_ERR("Could not set LCD configuration (%d)", ret);
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return ret;
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}
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if (config->inverted) {
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ret = st7796s_send_cmd(dev, ST7796S_CMD_INVON, NULL, 0);
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} else {
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ret = st7796s_send_cmd(dev, ST7796S_CMD_INVOFF, NULL, 0);
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}
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if (ret < 0) {
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return ret;
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}
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param = ST7796S_CONTROL_16BIT;
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ret = st7796s_send_cmd(dev, ST7796S_CMD_COLMOD, ¶m, sizeof(param));
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if (ret < 0) {
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return ret;
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}
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param = config->madctl;
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ret = st7796s_send_cmd(dev, ST7796S_CMD_MADCTL, ¶m, sizeof(param));
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if (ret < 0) {
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return ret;
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}
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/* Exit sleep */
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st7796s_send_cmd(dev, ST7796S_CMD_SLPOUT, NULL, 0);
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/* Delay 5ms after sleep out command, per datasheet */
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k_msleep(5);
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/* Turn on display */
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st7796s_send_cmd(dev, ST7796S_CMD_DISPON, NULL, 0);
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return 0;
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}
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static const struct display_driver_api st7796s_api = {
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.blanking_on = st7796s_blanking_on,
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.blanking_off = st7796s_blanking_off,
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.write = st7796s_write,
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.get_capabilities = st7796s_get_capabilities,
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};
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#define ST7796S_INIT(n) \
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static const struct st7796s_config st7796s_config_##n = { \
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.mipi_dbi = DEVICE_DT_GET(DT_INST_PARENT(n)), \
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.dbi_config = { \
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.config = MIPI_DBI_SPI_CONFIG_DT( \
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DT_DRV_INST(n), \
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SPI_OP_MODE_MASTER | \
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SPI_WORD_SET(8), \
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0), \
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.mode = DT_INST_PROP_OR(n, mipi_mode, \
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MIPI_DBI_MODE_SPI_4WIRE), \
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}, \
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.width = DT_INST_PROP(n, width), \
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.height = DT_INST_PROP(n, height), \
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.inverted = DT_INST_PROP(n, color_invert), \
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.dic = DT_INST_ENUM_IDX(n, invert_mode), \
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.frmctl1 = DT_INST_PROP(n, frmctl1), \
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.frmctl2 = DT_INST_PROP(n, frmctl2), \
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.frmctl3 = DT_INST_PROP(n, frmctl3), \
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.bpc = DT_INST_PROP(n, bpc), \
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.dfc = DT_INST_PROP(n, dfc), \
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.pwr1 = DT_INST_PROP(n, pwr1), \
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.pwr2 = DT_INST_PROP(n, pwr2), \
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.pwr3 = DT_INST_PROP(n, pwr3), \
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.vcmpctl = DT_INST_PROP(n, vcmpctl), \
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.doca = DT_INST_PROP(n, doca), \
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.pgc = DT_INST_PROP(n, pgc), \
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.ngc = DT_INST_PROP(n, ngc), \
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.madctl = DT_INST_PROP(n, madctl), \
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.rgb_is_inverted = DT_INST_PROP(n, rgb_is_inverted), \
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}; \
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\
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DEVICE_DT_INST_DEFINE(n, st7796s_init, \
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NULL, \
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NULL, \
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&st7796s_config_##n, \
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POST_KERNEL, CONFIG_DISPLAY_INIT_PRIORITY, \
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&st7796s_api);
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DT_INST_FOREACH_STATUS_OKAY(ST7796S_INIT)
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