50 lines
1.3 KiB
C
50 lines
1.3 KiB
C
/*
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* Copyright (c) 2021 Microchip Technology Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/sys/__assert.h>
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#include <zephyr/device.h>
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#include <zephyr/init.h>
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#include <soc.h>
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#include <zephyr/kernel.h>
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#include <zephyr/arch/cpu.h>
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#include <cmsis_core.h>
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/* Enable SWD and ETM debug interface and pins.
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* NOTE: ETM TRACE pins exposed on MEC172x EVB J30 12,14,16,18,20.
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*/
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static void configure_debug_interface(void)
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{
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struct ecs_regs *ecs = (struct ecs_regs *)(DT_REG_ADDR(DT_NODELABEL(ecs)));
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#ifdef CONFIG_SOC_MEC172X_DEBUG_DISABLED
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ecs->ETM_CTRL = 0;
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ecs->DEBUG_CTRL = 0;
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#elif defined(CONFIG_SOC_MEC172X_DEBUG_WITHOUT_TRACING)
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ecs->ETM_CTRL = 0;
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ecs->DEBUG_CTRL = (MCHP_ECS_DCTRL_DBG_EN | MCHP_ECS_DCTRL_MODE_SWD);
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#elif defined(CONFIG_SOC_MEC172X_DEBUG_AND_TRACING)
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#if defined(CONFIG_SOC_MEC172X_DEBUG_AND_ETM_TRACING)
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ecs->ETM_CTRL = 1u;
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ecs->DEBUG_CTRL = (MCHP_ECS_DCTRL_DBG_EN | MCHP_ECS_DCTRL_MODE_SWD);
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#elif defined(CONFIG_SOC_MEC172X_DEBUG_AND_SWV_TRACING)
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ecs->ETM_CTRL = 0;
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ecs->DEBUG_CTRL = (MCHP_ECS_DCTRL_DBG_EN | MCHP_ECS_DCTRL_MODE_SWD_SWV);
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#endif /* CONFIG_SOC_MEC172X_DEBUG_AND_ETM_TRACING */
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#endif /* CONFIG_SOC_MEC172X_DEBUG_DISABLED */
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}
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static int soc_init(void)
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{
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configure_debug_interface();
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return 0;
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}
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SYS_INIT(soc_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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