38 lines
716 B
Plaintext
38 lines
716 B
Plaintext
# Copyright (c) 2019 Synopsys, Inc. All rights reserved.
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# SPDX-License-Identifier: Apache-2.0
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if SOC_NSIM_HS_SMP
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config CPU_HS3X
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default y
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config NUM_IRQ_PRIO_LEVELS
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# This processor supports 16 priority levels:
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# 0 for Fast Interrupts (FIRQs) and 1-15 for Regular Interrupts (IRQs).
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default 2
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config NUM_IRQS
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# must be > the highest interrupt number used
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default 88
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config RGF_NUM_BANKS
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default 2
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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# SMP simulation is slower than single core, 1 Mhz seems reasonable match with wallclock
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default 1000000
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config ARC_FIRQ
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default y
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config CACHE_MANAGEMENT
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default y
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config ARC_CONNECT
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default y
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config MP_MAX_NUM_CPUS
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default 2
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endif # SOC_NSIM_HS_SMP
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