34 lines
537 B
Plaintext
34 lines
537 B
Plaintext
/*
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* Copyright (c) 2023 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <xtensa/xtensa.dtsi>
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#include <mem.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "cdns,tensilica-xtensa-lx7";
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reg = <0>;
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};
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};
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sram0: memory@8e000000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x8e000000 DT_SIZE_K(512)>;
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};
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sram1: memory@8e800000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0x8e800000 DT_SIZE_K(512)>;
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};
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};
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