05434d1bb6
On Quark SE, to enter the Low Power Sensing Standby(LPSS) State, ARC can enter the Deep Sleep state (LPSS bit enable + SS2) and wait for the Lakemont core to enter C2 or C2LP state. To achieve LPSS, ARC core enters the Deep Sleep state much before the Lakemont core enters the C2 or C2LP state and waits for the LPSS entry. Also fixed the Deep Sleep state entry according to the Quark SE C100 documentation. Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com> |
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| src | ||
| CMakeLists.txt | ||
| prj.conf | ||
| testcase.yaml | ||