64 lines
1.7 KiB
C
64 lines
1.7 KiB
C
/*
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* Copyright (c) 2017 SiFive Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _SIFIVE_PRCI_H
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#define _SIFIVE_PRCI_H
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#define _REG32(p, i) (*(volatile uint32_t *) ((p) + (i)))
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#define PRCI_REG(offset) _REG32(PRCI_BASE_ADDR, offset)
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/* Register offsets */
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#define PRCI_HFROSCCFG (0x0000)
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#define PRCI_HFXOSCCFG (0x0004)
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#define PRCI_PLLCFG (0x0008)
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#define PRCI_PLLDIV (0x000C)
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#define PRCI_PROCMONCFG (0x00F0)
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/* Fields */
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#define ROSC_DIV(x) (((x) & 0x2F) << 0)
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#define ROSC_TRIM(x) (((x) & 0x1F) << 16)
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#define ROSC_EN(x) (((x) & 0x1) << 30)
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#define ROSC_RDY(x) (((x) & 0x1) << 31)
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#define XOSC_EN(x) (((x) & 0x1) << 30)
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#define XOSC_RDY(x) (((x) & 0x1) << 31)
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#define PLL_R(x) (((x) & 0x7) << 0)
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/* single reserved bit for F LSB. */
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#define PLL_F(x) (((x) & 0x3F) << 4)
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#define PLL_Q(x) (((x) & 0x3) << 10)
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#define PLL_SEL(x) (((x) & 0x1) << 16)
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#define PLL_REFSEL(x) (((x) & 0x1) << 17)
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#define PLL_BYPASS(x) (((x) & 0x1) << 18)
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#define PLL_LOCK(x) (((x) & 0x1) << 31)
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#define PLL_R_default 0x1
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#define PLL_F_default 0x1F
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#define PLL_Q_default 0x3
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#define PLL_REFSEL_HFROSC 0x0
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#define PLL_REFSEL_HFXOSC 0x1
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#define PLL_SEL_HFROSC 0x0
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#define PLL_SEL_PLL 0x1
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#define PLL_FINAL_DIV(x) (((x) & 0x3F) << 0)
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#define PLL_FINAL_DIV_BY_1(x) (((x) & 0x1) << 8)
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#define PROCMON_DIV(x) (((x) & 0x1F) << 0)
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#define PROCMON_TRIM(x) (((x) & 0x1F) << 8)
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#define PROCMON_EN(x) (((x) & 0x1) << 16)
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#define PROCMON_SEL(x) (((x) & 0x3) << 24)
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#define PROCMON_NT_EN(x) (((x) & 0x1) << 28)
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#define PROCMON_SEL_HFCLK 0
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#define PROCMON_SEL_HFXOSCIN 1
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#define PROCMON_SEL_PLLOUTDIV 2
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#define PROCMON_SEL_PROCMON 3
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#endif /* _SIFIVE_PRCI_H */
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