zephyr

History

Henrik Brix Andersen 75549fc560 soc: arm: nxp: kinetis: k6x: enable RTC device Enable the RTC counter present in the NXP K6x SoC if CONFIG_COUNTER is enabled. Add the needed dts fixup for the RTC device. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>		2020-01-22 06:27:30 -06:00
..
CMakeLists.txt	…
Kconfig.defconfig.mk64f12	soc: arm: nxp: kinetis: k6x: enable RTC device	2020-01-22 06:27:30 -06:00
Kconfig.defconfig.series	soc: arm: nxp kinetis: force custom fixed MPU region configuration	2019-12-09 11:51:14 -05:00
Kconfig.series	soc: arm: nxp_kinetis: Select CPU DWT feature symbol	2020-01-20 14:05:47 +01:00
Kconfig.soc	soc: arm: nxp: kinetis: k6x: enable RTC device	2020-01-22 06:27:30 -06:00
README.txt	…
dts_fixup.h	soc: arm: nxp: kinetis: k6x: enable RTC device	2020-01-22 06:27:30 -06:00
linker.ld	arch: arm: Move ARM code to AArch32 sub-directory	2019-12-20 11:40:59 -05:00
nxp_mpu_regions.c	arch: arm: Move ARM code to AArch32 sub-directory	2019-12-20 11:40:59 -05:00
soc.c	soc: nxp: k6x: enable bandgap buffer if temperature sensor is enabled	2020-01-16 17:30:42 -06:00
soc.h	dts: Rename generated_dts_board.{h,conf} to devicetree.{h,conf}	2020-01-17 17:57:59 +01:00
wdog.S	arm: arch code naming cleanup	2019-10-04 10:46:23 +02:00

README.txt

Notes on the FSL FRDM K64F SRAM base address and size

Although the K64F CPU has 64 kB of SRAM at 0x1FFF0000 (code space), it is not
used by the FSL FRDM K64F platform.  Only the 192 kB region based at the
standard ARMv7-M SRAM base address of 0x20000000 is supported.

As such the following values are used:

CONFIG_SRAM_BASE_ADDRESS=0x20000000
CONFIG_SRAM_SIZE=64      # Measured in kB