141 lines
2.7 KiB
Plaintext
141 lines
2.7 KiB
Plaintext
/*
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* Copyright (c) 2017 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "skeleton.dtsi"
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#include <dt-bindings/interrupt-controller/intel-ioapic.h>
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#include <dt-bindings/i2c/i2c.h>
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#define __SIZE_K(x) (x * 1024)
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "intel,quark";
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reg = <0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arc";
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reg = <1>;
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};
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intc: ioapic@fec00000 {
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compatible = "intel,ioapic";
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reg = <0xfec00000 0x100000>;
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interrupt-controller;
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#interrupt-cells = <3>;
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};
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};
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flash0: flash@40010000 {
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reg = <0x40010000 DT_FLASH_SIZE>;
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};
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flash1: flash@40030000 {
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reg = <0x40030000 DT_FLASH_SIZE>;
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};
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sram0: memory@a8007000 {
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device_type = "memory";
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compatible = "mmio-sram";
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reg = <0xa8007000 DT_SRAM_SIZE>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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rtc: rtc@b0000400 {
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compatible = "intel,qmsi-rtc";
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reg = <0xb0000400 0x400>;
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clock-frequency = <32768>;
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interrupts = <11 IRQ_TYPE_EDGE_RISING 2>;
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interrupt-parent = <&intc>;
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label = "RTC_0";
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};
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uart0: uart@b0002000 {
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compatible = "intel,qmsi-uart";
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reg = <0xb0002000 0x400>;
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label = "UART_0";
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interrupts = <5 IRQ_TYPE_LEVEL_HIGH 3>;
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interrupt-parent = <&intc>;
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status = "disabled";
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};
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uart1: uart@b0002400 {
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compatible = "intel,qmsi-uart";
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reg = <0xb0002400 0x400>;
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label = "UART_1";
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interrupts = <6 IRQ_TYPE_LEVEL_HIGH 3>;
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interrupt-parent = <&intc>;
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status = "disabled";
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};
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gpio0: gpio@b0000c00 {
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compatible = "intel,qmsi-gpio";
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reg = <0xb0000c00 0x400>;
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interrupts = <8 IRQ_TYPE_LEVEL_HIGH 2>;
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interrupt-parent = <&intc>;
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label = "GPIO_0";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio1: gpio@b0800b00 {
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compatible = "intel,qmsi-gpio";
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reg = <0xb0800b00 0x400>;
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interrupts = <31 IRQ_TYPE_LEVEL_HIGH 2>;
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interrupt-parent = <&intc>;
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label = "GPIO_1";
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gpio-controller;
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#gpio-cells = <2>;
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};
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usb_cdc: virtualcom@0 {
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compatible = "intel,qmsi-usb";
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label = "CDC_ACM";
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};
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i2c0: i2c@b0002800 {
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compatible = "intel,qmsi-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xb0002800 0x400>;
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interrupts = <36 IRQ_TYPE_LEVEL_HIGH 2>;
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interrupt-parent = <&intc>;
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label = "I2C_0";
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status = "disabled";
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};
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i2c1: i2c@b0002c00 {
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compatible = "intel,qmsi-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xb0002c00 0x400>;
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interrupts = <37 IRQ_TYPE_LEVEL_HIGH 2>;
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interrupt-parent = <&intc>;
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label = "I2C_1";
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status = "disabled";
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};
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};
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};
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