318 lines
7.6 KiB
Plaintext
318 lines
7.6 KiB
Plaintext
/*
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* Copyright (c) 2011-2014, Wind River Systems, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file
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* @brief Linker command/script file
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*
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* This is the linker script for both standard images and XIP images.
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*/
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#include <autoconf.h>
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/* physical address where the kernel is loaded */
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#define PHYS_LOAD_ADDR CONFIG_PHYS_LOAD_ADDR
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/* physical address of RAM */
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#ifdef CONFIG_XIP
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#define PHYS_RAM_ADDR CONFIG_PHYS_RAM_ADDR
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#else /* !CONFIG_XIP */
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#define PHYS_RAM_ADDR PHYS_LOAD_ADDR
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#endif /* CONFIG_XIP */
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MEMORY
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{
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#ifdef CONFIG_XIP
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ROM (rx) : ORIGIN = PHYS_LOAD_ADDR, LENGTH = CONFIG_ROM_SIZE*1K
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RAM (wx) : ORIGIN = PHYS_RAM_ADDR, LENGTH = CONFIG_RAM_SIZE*1K
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#else /* !CONFIG_XIP */
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RAM (wx) : ORIGIN = PHYS_LOAD_ADDR, LENGTH = CONFIG_RAM_SIZE*1K
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#endif /* CONFIG_XIP */
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/*
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* It doesn't matter where this region goes as it is stripped from the
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* final ELF image. The address doesn't even have to be valid on the
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* target. However, it shouldn't overlap any other regions.
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*/
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IDT_LIST : ORIGIN = 2K, LENGTH = 2K
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}
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#define _LINKER
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#define _ASMLANGUAGE
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#include <linker-defs.h>
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#include <offsets.h>
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#include <misc/util.h>
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#define MMU_PAGE_SIZE KB(4)
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#include <linker-tool.h>
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/* SECTIONS definitions */
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SECTIONS
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{
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GROUP_START(ROMABLE_REGION)
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_image_rom_start = PHYS_LOAD_ADDR;
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_image_text_start = PHYS_LOAD_ADDR;
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SECTION_PROLOGUE(_TEXT_SECTION_NAME, (OPTIONAL),)
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{
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. = CONFIG_TEXT_SECTION_OFFSET;
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*(.text_start)
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*(".text_start.*")
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*(.text)
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*(".text.*")
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*(.gnu.linkonce.t.*)
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*(.eh_frame)
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*(.init)
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*(.fini)
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*(.eini)
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KEXEC_PGALIGN_PAD(MMU_PAGE_SIZE)
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} GROUP_LINK_IN(ROMABLE_REGION)
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_image_text_end = .;
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#ifdef CONFIG_CPLUSPLUS
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SECTION_PROLOGUE(_CTOR_SECTION_NAME, ,)
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{
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/*
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* The compiler fills the constructor pointers table below, hence symbol
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* __CTOR_LIST__ must be aligned on 4 byte boundary.
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* To align with the C++ standard, the first elment of the array
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* contains the number of actual constructors. The last element is
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* NULL.
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*/
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. = ALIGN(4);
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__CTOR_LIST__ = .;
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LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
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KEEP(*(SORT_BY_NAME(".ctors*")))
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LONG(0)
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__CTOR_END__ = .;
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} GROUP_LINK_IN(ROMABLE_REGION)
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SECTION_PROLOGUE(init_array, (OPTIONAL),)
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{
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. = ALIGN(4);
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__init_array_start = .;
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KEEP(*(SORT_BY_NAME(".init_array*")))
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__init_array_end = .;
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} GROUP_LINK_IN(ROMABLE_REGION)
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#endif
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SECTION_PROLOGUE(devconfig, (OPTIONAL),)
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{
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__devconfig_start = .;
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*(".devconfig.*")
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KEEP(*(SORT_BY_NAME(".devconfig*")))
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__devconfig_end = .;
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} GROUP_LINK_IN(ROMABLE_REGION)
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SECTION_PROLOGUE(_RODATA_SECTION_NAME, (OPTIONAL),)
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{
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*(.rodata)
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*(".rodata.*")
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*(.gnu.linkonce.r.*)
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IDT_MEMORY
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#ifndef CONFIG_X86_FIXED_IRQ_MAPPING
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IRQ_TO_INTERRUPT_VECTOR_MEMORY
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#endif
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KEXEC_PGALIGN_PAD(MMU_PAGE_SIZE)
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} GROUP_LINK_IN(ROMABLE_REGION)
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_image_rom_end = .;
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__data_rom_start = ALIGN(4); /* XIP imaged DATA ROM start addr */
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GROUP_END(ROMABLE_REGION)
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/* RAM */
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GROUP_START(RAM)
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SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME, (OPTIONAL),)
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{
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KEXEC_PGALIGN_PAD(MMU_PAGE_SIZE)
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_image_ram_start = .;
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__data_ram_start = .;
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*(.top_of_image_ram)
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*(.top_of_image_ram.*)
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*(.data)
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*(".data.*")
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. = ALIGN(4);
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} GROUP_DATA_LINK_IN(RAM, ROM)
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SECTION_DATA_PROLOGUE(initlevel, (OPTIONAL),)
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{
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DEVICE_INIT_SECTIONS()
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KEXEC_PGALIGN_PAD(MMU_PAGE_SIZE)
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} GROUP_DATA_LINK_IN(RAM, ROM)
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SECTION_DATA_PROLOGUE(_k_task_list, ALIGN(4), ALIGN(4))
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{
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_k_task_list_start = .;
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*(._k_task_list.public.*)
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*(._k_task_list.private.*)
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_k_task_list_idle_start = .;
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*(._k_task_list.idle.*)
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KEEP(*(SORT_BY_NAME("._k_task_list*")))
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_k_task_list_end = .;
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} GROUP_DATA_LINK_IN(RAM, ROM)
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SECTION_DATA_PROLOGUE(_k_task_ptr, (OPTIONAL),)
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{
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_k_task_ptr_start = .;
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*(._k_task_ptr.public.*)
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*(._k_task_ptr.private.*)
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*(._k_task_ptr.idle.*)
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KEEP(*(SORT_BY_NAME("._k_task_ptr*")))
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_k_task_ptr_end = .;
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} GROUP_DATA_LINK_IN(RAM, ROM)
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SECTION_DATA_PROLOGUE(_k_pipe_ptr, (OPTIONAL),)
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{
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_k_pipe_ptr_start = .;
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*(._k_pipe_ptr.public.*)
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*(._k_pipe_ptr.private.*)
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KEEP(*(SORT_BY_NAME("._k_pipe_ptr*")))
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_k_pipe_ptr_end = .;
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} GROUP_DATA_LINK_IN(RAM, ROM)
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SECTION_DATA_PROLOGUE(_k_mem_map_ptr, (OPTIONAL),)
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{
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_k_mem_map_ptr_start = .;
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*(._k_mem_map_ptr.public.*)
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*(._k_mem_map_ptr.private.*)
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KEEP(*(SORT_BY_NAME("._k_mem_map_ptr*")))
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_k_mem_map_ptr_end = .;
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} GROUP_DATA_LINK_IN(RAM, ROM)
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SECTION_DATA_PROLOGUE(_k_event_list, (OPTIONAL),)
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{
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_k_event_list_start = .;
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*(._k_event_list.event.*)
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KEEP(*(SORT_BY_NAME("._k_event_list*")))
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_k_event_list_end = .;
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} GROUP_DATA_LINK_IN(RAM, ROM)
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SECTION_PROLOGUE(_k_memory_pool, (OPTIONAL),)
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{
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*(._k_memory_pool.struct*)
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KEEP(*(SORT_BY_NAME("._k_memory_pool.struct*")))
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_k_mem_pool_start = .;
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*(._k_memory_pool.*)
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KEEP(*(SORT_BY_NAME("._k_memory_pool*")))
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_k_mem_pool_end = .;
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} GROUP_LINK_IN(RAM)
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__data_ram_end = .;
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SECTION_PROLOGUE(_BSS_SECTION_NAME, (NOLOAD OPTIONAL),)
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{
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/*
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* For performance, BSS section is forced to be both 4 byte aligned and
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* a multiple of 4 bytes.
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*/
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. = ALIGN(4);
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__bss_start = .;
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*(.bss)
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*(".bss.*")
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COMMON_SYMBOLS
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/*
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* As memory is cleared in words only, it is simpler to ensure the BSS
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* section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
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*/
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. = ALIGN(4);
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__bss_end = .;
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KEXEC_PGALIGN_PAD(MMU_PAGE_SIZE)
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} GROUP_LINK_IN(RAM)
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#ifdef CONFIG_XIP
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/*
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* Ensure linker keeps sections in correct order, despite the fact
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* the previous section specified a load address and this no-load
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* section doesn't.
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*/
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GROUP_FOLLOWS_AT(RAM)
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#endif
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SECTION_PROLOGUE(_NOINIT_SECTION_NAME, (NOLOAD OPTIONAL),)
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{
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/*
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* This section is used for non-initialized objects that
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* will not be cleared during the boot process.
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*/
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*(.noinit)
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*(".noinit.*")
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INT_STUB_NOINIT
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*(.bottom_of_image_ram)
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*(.bottom_of_image_ram.*)
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} GROUP_LINK_IN(RAM)
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/* Define linker symbols */
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_image_ram_end = .;
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_end = .; /* end of image */
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. = ALIGN(MMU_PAGE_SIZE);
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__bss_num_words = (__bss_end - __bss_start) >> 2;
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GROUP_END(RAM)
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/* static interrupts */
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SECTION_PROLOGUE(intList, (OPTIONAL),)
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{
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KEEP(*(.spurIsr))
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KEEP(*(.spurNoErrIsr))
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__INT_LIST_START__ = .;
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LONG((__INT_LIST_END__ - __INT_LIST_START__) / __ISR_LIST_SIZEOF)
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KEEP(*(.intList))
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KEEP(*(.gnu.linkonce.intList.*))
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__INT_LIST_END__ = .;
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} > IDT_LIST
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/* verify we don't have rogue .init_<something> initlevel sections */
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SECTION_PROLOGUE(initlevel_error, (OPTIONAL), )
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{
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DEVICE_INIT_UNDEFINED_SECTION()
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}
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ASSERT(SIZEOF(initlevel_error) == 0, "Undefined initialization levels used.")
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}
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#ifdef CONFIG_XIP
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/*
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* Round up number of words for DATA section to ensure that XIP copies the
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* entire data section. XIP copy is done in words only, so there may be up
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* to 3 extra bytes copied in next section (BSS). At run time, the XIP copy
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* is done first followed by clearing the BSS section.
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*/
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__data_size = (__data_ram_end - __data_ram_start);
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__data_num_words = (__data_size + 3) >> 2;
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#endif
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/* start adding platform specific linker sections here */
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/* no sections should appear after linker-epilog.h */
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#include <arch/x86/linker-epilog.h>
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