Conor Paxton dc5cf9cb1c soc: mpfs: describe the correct amount of irqs available. ... Microchip's PolarFire SoC (MPFS) has 186 available interrupts. Fix the Kconfig symbols. While we're at at: remove commented out code Signed-off-by: Conor Paxton <conor.paxton@microchip.com>		2023-12-06 17:54:29 +00:00
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espressif_esp32	soc: esp32: call reset cause reason init	2023-11-27 19:59:45 +01:00
litex-vexriscv	cmake: riscv: update riscv SoC to use SOC_LINKER_SCRIPT variable	2023-11-03 11:01:23 +01:00
openisa_rv32m1	cmake: riscv: update riscv SoC to use SOC_LINKER_SCRIPT variable	2023-11-03 11:01:23 +01:00
riscv-ite	ITE: drivers/i2c: Add a property for I2C located channel	2023-11-08 10:08:28 +01:00
riscv-privileged	soc: mpfs: describe the correct amount of irqs available.	2023-12-06 17:54:29 +00:00
CMakeLists.txt	…