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Andrew Boie 506f15c381 interrupts: simplify position of sw ISR table 
We now place the linker directives for the SW ISR table
in the common linker scripts, instead of repeating it
everywhere.

The table will be placed in RAM if dynamic interrupts are
enabled.

A dedicated section is used, as this data must not move
in between build phases.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
 		2018-11-10 11:01:22 -05:00
..
D_108mini interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
D_212GP interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
D_233L interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
XRC_D2PM_5swIrq interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
XRC_FUSION_AON_ALL_LM interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
esp32 interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
hifi2_std interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
hifi3_bd5 interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
hifi3_bd5_call0 interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
hifi4_bd7 interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
hifi_mini interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
hifi_mini_4swIrq interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
intel_s1000 interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00
sample_controller interrupts: simplify position of sw ISR table 2018-11-10 11:01:22 -05:00